Memory Protection Unit for Secure IoT Microcontroller
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Solution Overview
Problem
Existing embedded systems in the 'Internet of Things' face challenges in ensuring high security and trustworthiness while managing both legally relevant and non-relevant applications with a single micro-controller, as multiple micro-controllers require more space, power, and offer less flexibility.
Innovation Solution
A memory protection unit that enforces separation between legally relevant and non-relevant memory portions within a single controller, allowing privileged applications to access the relevant portion while preventing unprivileged applications from compromising the secure memory, using a controller with a privileged and unprivileged mode interface and an interrupt system to handle unauthorized access attempts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple micro-controllers are used to separate legally relevant and non-relevant functionality, then security and trustworthiness are improved, but device complexity, PCB space, and power consumption increase
Solution Approach 1:
The patent segments the memory space into legally relevant and legally non-relevant portions, allowing a single micro-controller to functionally separate secure and non-secure operations through memory partitioning rather than physical separation of processors
Solution Approach 2:
The patent merges multiple micro-controller functionalities into a single micro-controller by implementing a memory protection unit that enforces security boundaries through software and hardware mechanisms, combining the benefits of multiple processors without their physical overhead
2Reliability
If multiple micro-controllers are used to separate legally relevant and non-relevant functionality, then security is improved, but PCB space and power consumption increase
Solution Approach 1:
The memory protection unit segments memory access paths to enforce security policies, allowing a single micro-controller to maintain security while avoiding the power overhead of multiple independent processors
Solution Approach 2:
The single micro-controller is designed to handle both legally relevant and non-relevant applications through a unified architecture with enforced memory boundaries, making the system more power-efficient by consolidating processing functions
3Reliability
If multiple micro-controllers are used to separate legally relevant and non-relevant functionality, then security is improved, but flexibility and adaptability decrease
Solution Approach 1:
The memory protection unit implements dynamic access control that can adapt to different application requirements while maintaining security boundaries, allowing the system to flexibly allocate and protect memory regions based on runtime needs
4Adaptability or versatility
If a single micro-controller is used to handle both legally relevant and non-relevant applications, then flexibility and resource efficiency are improved, but security and trustworthiness worsen
Solution Approach 1:
The patent applies different security qualities to different memory regions, with the memory protection unit enforcing strict access controls on legally relevant portions while allowing more flexible access to non-relevant portions, creating localized security zones within a unified system
5Reliability
If memory separation is enforced within a single controller, then security is maintained, but device complexity increases
Solution Approach 1:
The memory protection unit acts as an intermediary layer between applications and memory, enforcing security policies through a standardized interface that manages access control without requiring complex application-level security implementations
Data Source
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AI summary
One implementation is for a device. The device includes a controller having a memory protection unit, a legally relevant memory portion capable of interacting with the controller, a legally non-relevant memory portion capable of interacting with the controller, an interface in the memory protection unit that allows a privileged application to access the legally relevant memory portion and disallows an unprivileged application to access to the legally relevant portion, and an interrupt system, wherein when the unprivileged application makes an attempt to interact with the legally relevant memory portion, the memory protection unit takes an action associated with the unprivileged application.