Memory Structure with Protective Layer and Void Mask

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Solution Overview

Problem

In the manufacturing process of non-volatile memory devices, ions generated can negatively impact the operation and reliability of memory devices, leading to reduced performance.

Innovation Solution

A memory structure and manufacturing method that involves forming multiple gate stack structures on a substrate, with a spacer layer and protective layer to block ions, and a void in the mask material layer to facilitate self-aligned etching, reducing the complexity and cost of the process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional manufacturing process is used, then the manufacturing process is simple, but ions enter the spacer layer and gate stack structure, reducing reliability

Engineering Contradiction:
Improvememory device reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A protective material layer is formed over the spacer layer and gate stack structure before subsequent processing steps. This protective layer is prepared in advance to prevent ion contamination during manufacturing, addressing the reliability issue before ions can cause damage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective material layer acts as an intermediary barrier between the ion-generating manufacturing environment and the sensitive spacer layer and gate stack structure. This intermediate layer blocks ion penetration while allowing the manufacturing process to proceed, thus protecting the memory device without fundamentally changing the manufacturing approach.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If multiple etching steps are performed to form separate mask layers, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvemask layer alignment precisionVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The mask material layer with voids is designed to automatically form spatially separated first mask layers during a single etching process. The voids cause the etched material to self-organize into discrete mask layers that are naturally positioned and separated, eliminating the need for multiple manual etching steps while maintaining high alignment precision.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The mask material layer is segmented with voids between adjacent gate stack structures, which causes the etched first mask layers to form as separate, spatially distinct layers. This segmentation is built into the mask layer structure itself, allowing precise mask formation without complex multi-step processes.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11538818B2Manufacturing method for memory structure
Publication Date: 2022.12.27 WINBOND ELECTRONICS CORP
  • US11538818B2 patent drawing
  • US11538818B2 patent drawing
  • US11538818B2 patent drawing

AI summary

A method of manufacturing a memory structure including the following steps is provided. A spacer layer is formed on sidewalls of gate stack structures. A protective material layer covering the spacer layer and the gate stack structures is formed. A mask material layer is formed on the protective material layer. There is a void located in the mask material layer between two adjacent gate stack structures. A first distance is between a top of the protective material layer and a top of the mask material layer. A second distance is between a top of the void and a top of the mask material layer above the void. A third distance is between a bottom of the void and a bottom of the mask material layer below the void. The first distance is greater than a sum of the second and third distances.