Memory Program Pulse Selection for Reliable TLC Data Writing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional memory sub-systems face inefficiencies in writing data due to reliance on single criteria for program pulses, leading to erratic behavior, read errors, and reduced performance as memory cells deteriorate, particularly in tri-level cell devices where charges shift across read levels, causing inaccuracies and abnormal firmware behavior.
Innovation Solution
A memory sub-system controller dynamically selects program pulses based on multiple criteria such as PEC count, RBER, inhibited cell count, and check failure unit counts to optimize writing speed and reliability, using a look-up table to map these criteria to appropriate pulse values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single criteria is used for program pulses, then device complexity is reduced, but reliability deteriorates due to erratic behavior and read errors
Solution Approach 1:
The patent implements dynamic program pulse selection by transitioning from a static single-criteria approach to a dynamic multi-criteria system. The controller continuously monitors multiple parameters (PEC count, RBER, inhibited cell count, check failure unit counts) and adjusts program pulse values in real-time based on current memory cell conditions, thereby maintaining reliability as memory deteriorates over time
Solution Approach 2:
The patent changes the parameters used for program pulse selection from a single parameter to multiple parameters. By incorporating PEC count, RBER, inhibited cell count, and check failure unit counts as selection criteria, the system achieves more reliable data writing. The look-up table maps combinations of these parameters to appropriate program pulse values, resolving the contradiction between complexity and reliability
2Productivity
If program pulses are strengthened to improve writing speed, then productivity increases, but harmful factors increase due to charge shifts and read errors
Solution Approach 1:
The system dynamically adjusts program pulse strength based on real-time memory cell conditions rather than using fixed strong pulses. By monitoring PEC count, RBER, and other parameters, the controller selects optimal pulse values from a look-up table, achieving high writing speed when conditions permit while preventing charge shifts when memory cells show signs of deterioration
Solution Approach 2:
The patent implements feedback mechanisms by continuously monitoring memory cell health through RBER, inhibited cell count, and check failure unit counts. This feedback information is used to adjust program pulse selection, ensuring that strong pulses are applied only when safe, thereby maintaining productivity while preventing harmful charge shifts
3Reliability
If program pulses are weakened to reduce stress on memory cells, then reliability improves, but productivity decreases due to slower writing speed
Solution Approach 1:
The system dynamically selects program pulse values based on current memory cell conditions rather than using consistently weak pulses. When memory cells are healthy (low PEC count, good RBER), stronger pulses are selected for high-speed writing. When deterioration is detected, weaker pulses are selected to prevent damage, thus achieving both high reliability and high productivity at different times
Solution Approach 2:
The patent changes the approach from fixed weak pulses to variable pulse selection based on multiple parameters. The look-up table contains a range of pulse values that are selected based on PEC count, RBER, inhibited cell count, and check failure unit counts, allowing the system to optimize between reliability and productivity
4Reliability
If multiple criteria are used for program pulse selection, then reliability improves, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-computing and storing optimal program pulse values in a look-up table based on various combinations of PEC count, RBER, inhibited cell count, and check failure unit counts. During operation, the controller simply queries the table with current parameters to obtain the appropriate pulse value, avoiding complex real-time calculations while maintaining high reliability
Solution Approach 2:
The look-up table serves as an intermediary between the complex multi-criteria analysis and the simple pulse selection. It pre-processes the complexity of evaluating multiple parameters and maps them to appropriate pulse values, allowing the controller to make reliable decisions without implementing complex decision logic
Data Source
AI summary
Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to modify pulses used to program memory components. The controller receives a request to program data in an individual memory component of a set of memory components. The controller computes a plurality of memory reliability criteria associated with the individual memory component and compares the plurality of memory reliability criteria to one or more threshold values. The controller selects a program pulse used to program the data to the individual memory component based on a result of comparing the plurality of memory reliability criteria to the one or more threshold values.