Memory Device Program Pulse Status Check
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Solution Overview
Problem
Existing memory devices face challenges in determining the final status of program operations, particularly in identifying errors that may occur due to the number of program pulses falling out of a preset range, which can lead to failures in data storage and retrieval.
Innovation Solution
A memory device and system that includes a memory cell array, peripheral circuit, and control logic to perform program operations, status checks, and number-of-program pulses comparisons, ensuring that the number of pulses used falls within a predetermined range to prevent errors and maintain data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory device performs only a basic status check operation after program operation, then the operation speed is fast and power consumption is low, but the reliability of determining program operation success is insufficient
Solution Approach 1:
The status determination process is segmented into multiple independent check operations: a first status check operation that performs basic verification, and a second status check operation that performs additional verification including number of program pulses comparison. This segmentation allows the system to perform comprehensive reliability checks while maintaining modular operation that can be selectively executed.
Solution Approach 2:
The patent performs a preliminary first status check operation immediately after the program operation to quickly determine basic program success. Based on the result of this preliminary check, the system then decides whether to perform the more comprehensive second status check operation, including the number of program pulses comparison, thereby performing preliminary filtering before more intensive verification.
2Reliability
If the memory device performs multiple status check operations including number of program pulses comparison, then the reliability of status determination is improved, but the operation time increases
Solution Approach 1:
The patent implements a two-tier status check system where the first status check operation performs essential verification with minimal time overhead, and the second status check operation performs additional verification including number of program pulses comparison. This partial action approach ensures that critical checks are always performed while additional verification is available when higher reliability is needed, balancing time consumption with accuracy.
Solution Approach 2:
The system uses feedback from the first status check operation to determine whether to proceed with the second status check operation. If the first check indicates clear program success or failure, the system may skip the second check, thereby reducing overall time. The feedback mechanism allows dynamic adjustment of verification depth based on initial results, optimizing the balance between reliability and time consumption.
Data Source
AI summary
Provided herein may be a memory device, a memory system having the memory device, and a method of operating the memory device. The memory device may include a memory cell array configured to store data, a peripheral circuit configured to perform a program operation on the memory cell array, and a control logic configured to perform the program operation by controlling the peripheral circuit and to perform a status check operation after the program operation. Here, the control logic may be configured to, based on a determination that the status check operation has passed, perform a number-of-program pulses comparison operation by comparing a number of program pulses used in the program operation to a first preset range.