Memory Purge Slicing for Interleaved Access Commands

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Solution Overview

Problem

Existing memory system purge operations incur additional latency and overhead due to the interruption of high-priority commands during continuous purge operations, leading to increased wear on memory blocks and reduced performance.

Innovation Solution

Implementing a sliced purge operation that allows for the execution of access commands while purge operations are in progress by removing invalid data in segments, storing a snapshot of data status, and completing the purge operation without restarting from the beginning.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If continuous purge operations are performed without interruption, then data integrity is maintained, but high-priority commands experience increased latency and the system performance deteriorates

Engineering Contradiction:
Improvedata integrityVSAvoidcommand latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The purge operation is divided into segments or slices, allowing the system to process invalid data in chunks rather than continuously. This segmentation enables the memory system to pause purge operations at predetermined intervals, allowing high-priority commands to be executed without excessive latency while maintaining data integrity through systematic validation of purged data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The purge operation is made dynamic by allowing it to be interrupted and resumed based on system conditions. The memory system can dynamically adjust the purge operation state between active and suspended states, enabling high-priority commands to be executed during suspended periods while ensuring the purge operation can be restarted without losing progress or data integrity.

Inventive Principle:
Principle #15Dynamics

2Speed

If purge operations are interrupted to execute high-priority commands, then system responsiveness improves, but additional latency and overhead are incurred due to restarting the purge operation

Engineering Contradiction:
Improvesystem responsivenessVSAvoidpurge operation latency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The system performs preliminary actions by validating data status and creating checkpoints before interrupting the purge operation. This preliminary validation ensures that when the purge operation is resumed, the system can continue from the validated checkpoint without needing to re-validate already-purged data, reducing the overhead and latency associated with restarting the purge operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory system implements feedback mechanisms by monitoring the state of purge operations and dynamically adjusting their execution. The system receives feedback about command queues and purge progress, and uses this feedback to determine when to suspend or resume purge operations, optimizing the balance between responsiveness and purge completion time.

Inventive Principle:
Principle #23Feedback

3Productivity

If purge operations are performed continuously, then invalid data is removed efficiently, but wear on memory blocks increases

Engineering Contradiction:
Improvepurge operation efficiencyVSAvoidmemory block lifespan
Core Design Contradiction:
ProductivityVSDuration of action of stationary object

Solution Approach 1:

The purge operation is converted from continuous to periodic action, where the system alternates between executing purge operations and executing access commands. This periodic execution pattern reduces the cumulative wear on memory blocks by spacing out erase operations, while maintaining overall purge efficiency by systematically processing invalid data over time through multiple interrupted and resumed purge cycles.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS20250383788A1Memory system purge operations with interleaved access commands
Publication Date: 2025.12.18 MICRON TECHNOLOGY INC
  • US20250383788A1 patent drawing
  • US20250383788A1 patent drawing
  • US20250383788A1 patent drawing

AI summary

Methods, systems, and devices for memory system purge operations with interleaved access commands are described. The described techniques provide for a memory system to perform a purge operation that enables the execution of access commands while the purge operation is in progress. For example, the memory system may receive a command indicating to perform a sliced purge operation and may begin erasing invalid data segments. The memory system may execute an access operation in between removing segments of invalid data, and may store information indicating a status of the data at a time when the command initiating the purge operation is received. The memory system may reference the information when removing segments of the invalid data after performing the access operation, which may support the memory system completing the purge operation without additional invalid data created by the access operation impacting the purge operation.