Memory Device Query Acceleration via Resident Circuitry

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Solution Overview

Problem

Existing memory systems face inefficiencies in data query processing due to the need for external circuitry to transfer and process data, leading to delays and bandwidth bottlenecks, which can be costly in terms of energy consumption and processing time.

Innovation Solution

Implementing a protocol within the host controller to instruct resident circuitry on the memory device to process data queries, allowing for parallel operations and reducing the amount of data sent to the host, thereby accelerating query speed and reducing energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is transferred to external circuitry for processing queries, then query processing can be performed, but processing time increases and bandwidth bottlenecks occur

Engineering Contradiction:
Improvequery processing speedVSAvoiddata transfer time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent extracts the query processing function from external circuitry and relocates it to resident circuitry within the memory device. This allows data to remain in the memory array while the resident circuitry processes queries directly, eliminating the need to transfer data externally and thus reducing data transfer time and avoiding bandwidth bottlenecks.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the memory system into distinct functional units: the memory array for data storage and the resident circuitry for query processing. This segmentation allows parallel operation where data remains in the array while dedicated circuitry processes queries, improving query processing speed without requiring data movement.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If all data is sent to the host for query processing, then complete query accuracy is achieved, but energy consumption increases

Engineering Contradiction:
Improvequery accuracyVSAvoidenergy consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by having the resident circuitry perform preliminary query processing and filtering within the memory device. Only the relevant results are then transferred to the host, rather than transferring all data. This maintains query accuracy for the results while significantly reducing the energy consumption associated with data transfer.

Inventive Principle:
Principle #16Partial or excessive action

3Adaptability or versatility

If external processing is used, then flexibility in query operations is maintained, but device complexity increases

Engineering Contradiction:
Improvequery operation flexibilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements multi-functionality by equipping the memory device with resident circuitry that can perform multiple query processing operations directly within the device. This includes various search, filter, and data retrieval operations, reducing reliance on external processing and simplifying the overall system architecture while maintaining operational flexibility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11797531B2Acceleration of data queries in memory
Publication Date: 2023.10.24 MICRON TECHNOLOGY INC
  • US11797531B2 patent drawing
  • US11797531B2 patent drawing
  • US11797531B2 patent drawing

AI summary

The present disclosure includes apparatuses, methods, and systems for acceleration of data queries in memory. An example host apparatus includes a controller configured to generate a search key, generate a query for particular data stored in an array of memory cells in a memory device, and send the query to the memory device. The query includes a command to search for the particular data. The query also includes a number of data fields for the particular data including a logical block address (LBA) for the particular data, an LBA offset for the particular data, and a parameter for an amount of bits in data stored in the memory device that do not match corresponding bits in the search key that would result in data not being sent to the host.