Memory Queue Merging Instructions and Completion Messages
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Solution Overview
Problem
Conventional systems require two independent storage spaces for processing instructions and completion messages, leading to inefficient storage utilization.
Innovation Solution
An electronic device with a memory queue where processing instructions are written and executed, and completion messages are generated and stored in the same target area, allowing for reuse of storage space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two independent storage spaces are allocated for processing instructions and completion messages, then the system can complete functions of the entire system, but much storage space is occupied
Solution Approach 1:
The patent merges the storage spaces for processing instructions and completion messages into a single queue structure. The processor writes processing instructions into target areas of the queue, and functional hardware writes completion messages into the same queue, allowing both types of data to share the same storage resource and reducing overall storage space occupation.
Solution Approach 2:
The queue structure is designed to serve multiple functions: it stores both processing instructions from the processor and completion messages from functional hardware. This multi-functional storage structure eliminates the need for separate dedicated storage spaces, thereby improving storage utilization while maintaining system reliability.
2Productivity
If two independent storage spaces are allocated for processing instructions and completion messages, then data processing can be performed, but storage utilization is reduced
Solution Approach 1:
The patent combines separate storage spaces for instructions and messages into a unified queue, enabling both data processing operations and improving storage utilization by eliminating redundant storage allocation.
Solution Approach 2:
The functional hardware reserves target areas after reading processing instructions, and the processor can reuse these target areas after completion messages are written. This dynamic allocation and recovery of storage space improves overall storage utilization while maintaining data processing productivity.
Data Source
AI summary
An electronic device includes a memory, a processor, and functional hardware. The memory includes a queue. The processor is configured to write a processing instruction into a target area of the queue. The functional hardware is configured to read the processing instruction from the target area and reserve the target area. The functional hardware generates a completion message according to the processing instruction, and writes the completion message into the target area after the processing instruction is executed. The completion message corresponds to the processing instruction.