Embedded Memory Randomization Circuitry for Side-Channel Attack Mitigation
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Solution Overview
Problem
Conventional embedded memories are highly susceptible to side-channel attacks, particularly power analysis attacks, due to data-dependent asymmetric current/power dissipation, which exposes sensitive information, and current countermeasures are impractical or lack gate-level or architectural design approaches for protection.
Innovation Solution
The introduction of randomization circuitry in peripheral circuitry operations to reduce the correlation between memory data and current consumption, achieved through various methods such as two-stage write operations, power boosting, and sense-amplifier control, which modulate current consumption patterns and supply voltage levels, thereby obscuring data-dependent power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional embedded memories are used for storing secret data, then area efficiency is improved, but security against side-channel attacks deteriorates
Solution Approach 1:
The patent changes the operational parameters of the memory system by introducing randomized control signals that vary the timing and sequence of read/write operations. This randomization alters the power consumption pattern parameters, making them independent of the stored data values while maintaining normal memory functionality and area efficiency.
Solution Approach 2:
The patent introduces an intermediary randomization module that sits between the control logic and the memory array. This module generates and applies random control signals to the peripheral circuitry, acting as a mediator that decouples the relationship between data operations and power consumption patterns without requiring changes to the memory cell structure.
2Object-affected harmful factors
If circuit level solutions are added to combat power analysis attacks, then security is improved, but device complexity and area overhead increase
Solution Approach 1:
The patent makes the existing peripheral circuitry multi-functional by enabling it to operate in both normal mode and randomized secure mode. The same read/write circuitry, sense amplifiers, and control logic serve both conventional and security-enhanced operations, eliminating the need for separate dedicated security circuits and reducing overall device complexity.
Solution Approach 2:
The patent introduces dynamic randomization to the previously static memory operation sequences. Control signals are now dynamically varied in timing and sequence based on random patterns, making the system adaptive and resistant to power analysis attacks without requiring additional hardware components, thereby maintaining low complexity.
3Object-affected harmful factors
If randomized control signals are applied to peripheral circuitry, then security against power analysis is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements self-service through internal randomization where the memory system generates its own random control signals using on-chip pseudo-random number generators. This eliminates the need for external precise timing equipment or complex manufacturing processes, as the randomization is inherently generated and managed by the device itself, maintaining standard manufacturing requirements.
Data Source
AI summary
A hardware memory includes at least one memory cell, peripheral circuitry and randomization circuitry. The memory cell(s) store data, which may be written to, read from and held in the hardware memory. The peripheral circuitry reads and writes data to the memory cell(s) and may perform other functions necessary for facilitating the data read, write and hold. The randomization circuitry randomizes operations performed by the peripheral circuitry to reduce a correlation between the data and the current consumed by the hardware memory.