Parallel Memory Rank Initialization via Parity Grouping
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Solution Overview
Problem
The initialization of memory in modern computer systems is time-consuming due to the sequential initialization of each memory rank, which can take significant time and resources, especially in systems with multiple memory units and ranks.
Innovation Solution
The use of parity-encoded rank selects allows for the simultaneous initialization of multiple memory ranks with the same parity, either even or odd, during the initialization mode, enabling parallel initialization of memory ranks and reducing the overall initialization time by half.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sequential initialization of each memory rank is used, then reliability and diagnostic capability are maintained through ECC units, but initialization time becomes excessively long
Solution Approach 1:
The patent segments memory ranks into multiple groups based on their rank select signal parity (even or odd). Each group can be initialized independently and simultaneously, transforming the sequential initialization process into a parallel one. This segmentation allows multiple ranks to be initialized at the same time while maintaining ECC reliability within each group.
Solution Approach 2:
The patent merges multiple memory ranks with the same parity into a single initialization group. By combining ranks that share the same parity characteristic, the system can initialize multiple ranks simultaneously using unified control signals, thereby reducing total initialization time while preserving ECC functionality through group-based error checking.
2Loss of time
If multiple memory ranks are initialized simultaneously, then initialization time is reduced, but system complexity increases due to additional control mechanisms
Solution Approach 1:
The patent applies local quality by assigning different initialization characteristics to different groups of memory ranks based on their parity. Even-parity ranks form one initialization group while odd-parity ranks form another, allowing each group to be initialized with optimized control signals tailored to its specific characteristics, thereby managing complexity through localized initialization strategies.
Solution Approach 2:
The patent changes the initialization parameter from sequential rank-by-rank processing to parallel group-based processing. By modifying the initialization approach to utilize parity-based grouping, the system achieves faster initialization while controlling complexity through parameter-driven organization rather than complex control logic.
3Productivity
If all memory ranks are initialized one at a time, then control simplicity is maintained, but productivity during system startup is reduced
Solution Approach 1:
The patent implements periodic action by alternating between initializing even-parity rank groups and odd-parity rank groups. This periodic initialization pattern allows the system to maintain relatively simple control logic while achieving improved productivity through parallel processing of memory ranks in an organized, alternating sequence.
Data Source
AI summary
A method and apparatus to improve memory initialization in a memory of a computer system. Memory units in the memory comprise a plurality of ranks, each rank having a unique rank select. A parity generator outputs a parity bit corresponding to whether an encoded rank select has an even or odd number of “1”s. The parity bit is used by an Error Checking and Correcting (ECC) unit that generates ECC bits that are stored in a rank having an active rank select. During a first interval in a memory initialization period, ranks having an even number of “1”s in their encoded rank select are initialized in parallel. During a second interval in the memory initialization period, ranks having an odd number of “1”s in their encoded rank select are initialized in parallel.