Memory Rank Reorder Scheduling for Low-Power High-Density Modules
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Solution Overview
Problem
The challenge of high idle or standby power consumption in high-density memory modules, particularly in CXL module form factors, exceeds power envelopes, necessitating innovative power reduction solutions to accommodate increasing memory density in data center environments.
Innovation Solution
A hardware-based rank reorder scheduler that groups and schedules memory requests based on memory ranks, employing a round robin scheduling procedure to optimize memory bandwidth and minimize latency, while transitioning non-scheduled ranks into low power states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high-density memory modules are used to increase memory capacity, then memory density is improved, but idle power consumption increases and exceeds power envelopes
Solution Approach 1:
The memory device is divided into multiple ranks (e.g., Rank 0, Rank 1, Rank 2, Rank 3) that can be independently controlled. The scheduler segments memory requests by rank and selectively activates only the ranks needed for current operations, allowing inactive ranks to enter low-power states. This segmentation enables the system to maintain high memory density while reducing idle power consumption by not keeping all ranks active simultaneously.
2Speed
If all memory ranks are kept active to ensure fast access, then access speed is improved, but power consumption increases
Solution Approach 1:
The system dynamically adjusts the operational state of memory ranks based on real-time workload requirements. The scheduler monitors memory requests and dynamically transitions ranks between active and low-power states. When multiple ranks are needed, they are activated; when fewer ranks are needed, inactive ranks transition to low-power states. This dynamic adaptation maintains fast access speeds when required while minimizing power consumption during idle or low-demand periods.
3Device complexity
If memory requests are processed in FIFO order, then simplicity is maintained, but processing efficiency and power optimization are reduced
Solution Approach 1:
The scheduler performs preliminary grouping of memory requests by rank before processing. By pre-organizing requests into rank-specific queues and determining which ranks need to be activated in advance, the system optimizes the activation sequence of memory ranks. This preliminary action reduces the complexity of real-time scheduling decisions while improving processing efficiency through better rank management and power state optimization.
Data Source
AI summary
In some implementations, a memory system may receive multiple memory requests associated with a memory, wherein the memory is associated with multiple memory ranks, and wherein each memory request, of the multiple memory requests, includes a memory address indicating a memory rank, of the multiple memory ranks, that is to be accessed for that memory request. The memory system may group the multiple memory requests based on the multiple memory ranks. The memory system may transmit, to a memory controller associated with the memory, a scheduled set of memory requests, wherein the scheduled set of memory requests includes memory requests selected from one or more groups of memory requests associated with one or more scheduled memory ranks of the multiple memory ranks.