Memory Column Redundancy Swapping at RAS Time
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Solution Overview
Problem
Existing memory devices face inefficiencies in redundant memory operations due to the time-consuming nature of column redundancy swapping, which affects the speed and latency of memory access.
Innovation Solution
Implementing column redundancy swaps at row address strobe (RAS) time instead of column address time to reduce the time required for redundancy swapping, thereby reducing the address access time (tAA) and improving memory access speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If column redundancy swapping is performed at column address time, then memory repair functionality is achieved, but address access time (tAA) increases and memory access speed decreases
Solution Approach 1:
The patent applies preliminary action by performing column redundancy swapping at row address strobe (RAS) time, which is before the column address phase. This allows the repair configuration to be established in advance, so that when column addressing occurs, the redundancy swap is already complete and does not add to the column address access time. The repair functionality is prepared beforehand, eliminating the time penalty that would otherwise be incurred during normal memory access operations.
2Reliability
If column redundancy swapping is performed at column address time, then faulty columns are repaired, but latency of memory access increases
Solution Approach 1:
The invention implements preliminary action by executing the column redundancy swap operation during the RAS time period, which precedes the column address phase in the memory access cycle. This timing strategy ensures that the repair configuration is established before column addressing begins, thereby preventing any addition to the memory access latency. The repair function is prepared in advance without interfering with the speed-critical column address path.
3Reliability
If redundant memory components are substituted for faulty cells, then memory reliability is improved, but the complexity of memory management increases
Solution Approach 1:
The patent implements self-service by providing that the column redundancy swap information is automatically provided at RAS time without requiring external intervention or complex management logic. The system self-configures the redundancy swap based on pre-determined repair information, eliminating the need for complex runtime management of redundant components. This automatic self-service mechanism maintains reliability while minimizing the complexity of redundancy management.
Data Source
AI summary
A memory device can include a bank of memory cells. The bank of memory cells can include multiple groups of columns of memory cells. The memory device can include controller circuitry to provide information pertaining to a column repair redundancy swap for repairing a selected group of the plurality of groups at row address strobe (RAS) time. Upon detection of an error condition in at least one group of columns of memory cells, the controller circuitry can implement the column repair redundancy swap on the corresponding group.