Memory Interface Re-Encryption Circuit for Key Detection Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing data security methods in processor-based systems are vulnerable to unauthorized access and key detection through monitoring of memory interfaces, as they rely on a single encryption key for extended periods, making the key susceptible to determination.
Innovation Solution
A memory interface circuit that includes an encrypt/decrypt circuit to re-encrypt encrypted data blocks using a second key after decrypting with a first key, and employs secure configuration registers to control occasional re-encryption, reducing the likelihood of key detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is encrypted using a single key for extended periods, then data security is maintained with simpler key management, but the encryption key becomes vulnerable to determination through monitoring
Solution Approach 1:
The patent implements dynamic key management by periodically changing encryption keys from a first key to a second key. The memory interface circuit dynamically selects which key to use based on timing conditions, transforming the static encryption system into a dynamic one that adapts over time to prevent key determination through monitoring.
Solution Approach 2:
The patent employs periodic key rotation where the encryption key is changed at predetermined time intervals or after a certain number of encryption operations. This periodic action disrupts any continuous monitoring attempts and prevents attackers from gathering sufficient data to determine the encryption key.
2Object-affected harmful factors
If re-encryption is performed frequently, then key detection vulnerability is reduced, but system complexity and processing overhead increase
Solution Approach 1:
The patent implements selective re-encryption rather than encrypting all data continuously. Re-encryption is performed partially based on predetermined conditions such as time intervals or specific triggering events, avoiding the excessive complexity of continuous re-encryption while still providing adequate security against key determination.
Solution Approach 2:
The patent changes encryption parameters by switching between different keys (from first key to second key) based on predetermined conditions. This parameter change approach allows the system to maintain security without requiring complete re-encryption of all data, thereby reducing system complexity.
3Reliability
If re-encryption operations are performed, then data security is enhanced, but processing time and energy consumption increase
Solution Approach 1:
The patent schedules re-encryption operations periodically based on predetermined time intervals or operation counts rather than continuously. This periodic approach balances security enhancement with acceptable processing time, as re-encryption occurs only when necessary according to the predetermined schedule.
Solution Approach 2:
The patent implements asynchronous re-encryption where certain operations can be skipped or rushed through based on system conditions. If security requirements are met through other means, re-encryption can be deferred, allowing the system to skip unnecessary processing steps and reduce overall processing time.
Data Source
AI summary
An exemplary memory interface circuit disclosed herein re-encrypts data in an encrypted data block in a memory circuit to further protect the data. In particular, the memory interface circuit reads an encrypted data block from the memory circuit and decrypts the encrypted data block using a first key that was previously used to encrypt the block of data. Then, the memory interface circuit encrypts the data again using a second key before storing the re-encrypted data back into the memory circuit. In some examples, the memory interface circuit includes a re-encryption circuit that includes secure configuration registers to control occasional re-encryption of the encrypted data in an effort to evade detection of the encryption key. In some examples, the time between re-encryptions may be adjusted in response to a frequency of memory accesses to the memory circuit.