Memory Read Compression Using Sub-Data Groups and Bit Positions
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Solution Overview
Problem
Existing memory devices face challenges in reducing the physical size of data compression circuits while maintaining efficient data transfer and recovery, particularly when the amount of data exceeds the capacity of the input/output channel.
Innovation Solution
A memory device that divides data into sub-data groups, detects first-value bits, and generates compressed-data chunks with position information, allowing for reduced circuitry area by limiting the number of compressed-data chunks per sub-data group and using error correction to recover original data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a compression circuit is added to the memory device to compress read data, then the amount of data that must be transferred through the input/output channel is reduced, but the physical size and complexity of the memory device increases
Solution Approach 1:
The patent divides the compression circuit into multiple independent compression units, where each unit processes a specific portion of data (e.g., one unit processes even-positioned bytes while another processes odd-positioned bytes). This segmentation allows parallel processing of data blocks, reducing the overall time required for compression while keeping each individual compression unit small in size, thus resolving the contradiction between data transfer efficiency and device physical size.
Solution Approach 2:
The patent introduces a time dimension by implementing pipelined compression where multiple data blocks are compressed in different time stages. While one compression unit is processing data block N, another unit simultaneously processes data block N-1. This temporal dimension allows the system to achieve high throughput without requiring all compression units to exist simultaneously in space, effectively reducing the physical footprint while maintaining compression capability.
2Area of stationary object
If the compression circuit is reduced in size to minimize memory device area, then the physical area is reduced, but the capability to handle large amounts of data efficiently is compromised
Solution Approach 1:
The compression circuit is segmented into multiple specialized units, each handling a specific compression algorithm or data portion. For example, one unit may handle run-length encoding while another handles dictionary-based compression. This segmentation allows each unit to be optimized for its specific function with minimal circuitry, yet collectively they provide comprehensive and efficient data compression capability.
Solution Approach 2:
The patent implements a dynamic compression circuit that can adaptively select and activate only the necessary compression units based on the characteristics of the input data. When the incoming data exhibits patterns suitable for a specific compression method, only that method's circuit is activated, reducing the effective circuit area in use while maintaining high compression efficiency when needed.
Data Source
AI summary
A memory device may include: a plurality of memory cells; a data manager for receiving data from the plurality of memory cells, and generating sub-data groups having a predetermined size, based on the received data; and a data compressor for detecting first-value bits having a first logic value among the bits in the received data, determining a number of target bits corresponding to each of the sub-data groups among the first-value bits to become 1 or less per sub-data group, and generating a plurality of compressed-data chunks including a logic value of the target bits and position information representing a position of the target bits in the data.