Memory Read Compression Using Sub-Data Bit Position Encoding
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Solution Overview
Problem
Existing memory devices face challenges in reducing the physical size of data compression circuits while maintaining data transfer efficiency, particularly when the amount of data read exceeds the capacity of the input/output channel.
Innovation Solution
A memory device that divides data into sub-data groups, detects first-value bits, and generates compressed-data chunks with position information, allowing for reduced circuitry area by limiting the number of compressed-data chunks per sub-data group.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a compression circuit is added to the memory device to compress read data, then the amount of data that must be transferred through the input/output channel is reduced, but the physical size and complexity of the memory device increases
Solution Approach 1:
The patent divides read data into multiple sub-data groups and processes them separately. The compression circuit only needs to handle one sub-data group at a time, reducing the required circuit size while still achieving overall data compression across the entire read data set
Solution Approach 2:
The patent applies compression selectively to only certain sub-data groups rather than processing all data uniformly. This partial action approach reduces the burden on the compression circuit, allowing it to be smaller while still achieving meaningful overall compression
2Area of stationary object
If the compression circuit is reduced in size to fit within the memory device, then the physical area is reduced, but the data compression capability and transfer efficiency may be compromised
Solution Approach 1:
By segmenting data into sub-data groups and processing them in batches, the patent enables a small compression circuit to achieve effective overall compression. The circuit processes manageable portions sequentially rather than being required to handle all data simultaneously
Solution Approach 2:
The patent introduces an intermediary data processing stage that divides incoming data into sub-data groups before they reach the compression circuit. This intermediary structure allows the small compression circuit to work efficiently on divided data while maintaining overall system compression effectiveness
Data Source
AI summary
A memory device may include: a plurality of memory cells; a data manager for receiving data from the plurality of memory cells, and generating sub-data groups having a predetermined size, based on the received data; and a data compressor for detecting first-value bits having a first logic value among the bits in the received data, determining a number of target bits corresponding to each of the sub-data groups among the first-value bits to become 1 or less per sub-data group, and generating a plurality of compressed-data chunks including a logic value of the target bits and position information representing a position of the target bits in the data.