Memory Read Error Correction Using Prior-Iteration Bit Flipping
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Solution Overview
Problem
Conventional memory sub-systems are time and resource intensive due to the need to process each bit of the sense word twice during error correction processes, leading to increased complexity and fewer errors being correctly corrected.
Innovation Solution
Configuring iterative error correction parameters using criteria from previous iterations or implementing adjustable parameters after a threshold number of iterations, reducing the number of passes over each bit and optimizing the error correction process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If each bit of the sense word is processed twice during error correction, then error detection accuracy is improved, but processing time and system complexity increase
Solution Approach 1:
The patent applies partial action by processing bits differently based on their error probability. Instead of uniformly processing all bits twice, the system identifies bits with high error probability (using metrics like log-likelihood ratios) and applies additional processing only to those specific bits, rather than all bits in the sense word
Solution Approach 2:
The patent implements local quality by applying different processing intensities to different bits based on their individual characteristics. Bits are categorized into different processing groups based on their reliability metrics, with higher processing applied to unreliable bits and minimal or no processing applied to reliable bits
2Reliability
If each bit of the sense word is processed twice during error correction, then error detection capability is enhanced, but device complexity increases
Solution Approach 1:
The patent reduces device complexity by implementing local quality - different processing paths are used for different bits based on their error characteristics. The system uses metrics like log-likelihood ratios to identify which bits need intensive processing versus which bits can be handled with simpler processing or skipped entirely
Solution Approach 2:
The patent applies partial action by performing exhaustive processing only on bits that exhibit high error probability, while applying minimal or no processing to bits that are already reliable. This selective approach reduces the overall computational complexity compared to processing all bits uniformly
3Reliability
If multiple iterations of error correction are performed, then more errors can be corrected, but processing time increases
Solution Approach 1:
The patent applies partial action by limiting full iterative processing to only those bits identified as having high error probability. Reliable bits are either skipped or processed with minimal iterations, reducing the average number of iterations across the entire data set while maintaining correction capability for problematic bits
Solution Approach 2:
The patent implements dynamics by making the number of iterations adaptive rather than fixed. The iteration count for each bit is dynamically determined based on its error probability metrics, allowing the system to concentrate processing resources on difficult-to-correct bits while quickly resolving or skipping easier cases
Data Source
AI summary
A processing device in a memory system receives a request to read data from a memory device. In response to receiving the request, the processing device performs an iterative error correction process on the data, wherein at least one iteration after a first iteration in the error correction process uses a criterion that is based at least partially on a previous iteration or partial iteration, and wherein performing the iterative error correction process comprises flipping any bits in the data having an associated number of unsatisfied parity check equations that satisfies a threshold criterion associated with the previous iteration.