Memory Read Booster Using Volatile Mapping for Faster LBA Translation
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Solution Overview
Problem
Memory systems face increased latency due to the need to dynamically load multi-level logical-to-physical (L2P) tables from non-volatile memory, which consumes valuable volatile memory resources and slows down access operations.
Innovation Solution
Implement a mapping table in volatile memory to store physical block addresses (PBAs) contiguously, allowing direct translation of logical block addresses (LBAs) without loading subsequent-level L2P tables from non-volatile memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level L2P tables are stored in non-volatile memory and loaded dynamically, then memory capacity is increased, but read latency increases and access speed decreases
Solution Approach 1:
The patent segments the L2P table into two parts: a first-level L2P table stored in volatile memory for fast access, and subsequent-level L2P tables stored in non-volatile memory for capacity. This segmentation allows the system to maintain fast read speeds for frequently accessed data while storing additional data in non-volatile memory, resolving the contradiction between speed and capacity.
Solution Approach 2:
The patent loads the first-level L2P table into volatile memory in advance before data access operations. This preliminary action ensures that the most frequently used mapping information is already available in fast memory, reducing read latency while still allowing access to larger data sets stored in non-volatile memory.
2Quantity of substance
If multi-level L2P tables are dynamically loaded from non-volatile memory, then data storage capacity is increased, but access latency increases
Solution Approach 1:
The patent divides the L2P table structure into a first-level table kept in volatile memory and subsequent-level tables stored in non-volatile memory. This segmentation allows the system to maintain fast access for common operations while storing additional data in non-volatile memory, thereby increasing capacity without significantly increasing access latency for frequently accessed data.
Solution Approach 2:
The patent pre-loads the first-level L2P table into volatile memory before data access operations occur. This preliminary action ensures that the most commonly needed mapping information is already available in fast memory, reducing access latency while still enabling access to larger data sets stored in non-volatile memory.
3Speed
If volatile memory is used to store L2P tables, then access speed is improved, but memory resource consumption increases
Solution Approach 1:
The patent segments the L2P table storage across two memory types: volatile memory for the first-level table (fast access) and non-volatile memory for subsequent-level tables (capacity). This segmentation allows the system to use volatile memory efficiently for only the most critical mapping data while storing additional data in non-volatile memory, thereby improving access speed without excessively consuming volatile memory resources.
Solution Approach 2:
The patent applies different storage qualities to different parts of the L2P table: the first-level table uses volatile memory with fast access characteristics for frequently used data, while subsequent-level tables use non-volatile memory with higher capacity characteristics for less frequently accessed data. This local quality differentiation optimizes the balance between access speed and memory resource consumption.
Data Source
AI summary
Methods, systems, and devices for read booster for operational data of a memory system are described. A memory system may access system-related data in a partition via a mapping table stored in volatile memory as opposed to loading multi-level logical-to-physical tables from non-volatile memory. For example, a host system may provide a logical block address (LBA) range of system-related data to be written to the partition using a first command. The memory system may contiguously store physical block addresses (PBAs) corresponding to the LBA range into one or more segments of the partition. To access a given PBA in a segment, the memory system may access one or more parameters stored in the mapping table, such as a starting PBA and size (e.g., in PBAs) for each respective segment.