Memory Read Calibration for Threshold Shift Correction
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Solution Overview
Problem
Existing memory devices face challenges in accurately reading data due to physical phenomena like charge loss, leading to significant threshold voltage shifts and increased error rates, especially in partially programmed blocks or near end-of-life states, where default read offsets are sub-optimal.
Innovation Solution
Implementing corrective read with parallel auto-read calibration (pARC) to identify the center voltage between adjacent programming distributions, using auto-read calibration to locate the valley bottom and apply calibrated read voltage levels for improved accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If default read offsets are used in memory devices, then read operations can be performed with simple circuitry, but error rates increase significantly due to threshold voltage shifts from charge loss
Solution Approach 1:
The patent performs auto-read calibration before the actual read operation to determine optimal read offsets based on the current state of memory cells. This preliminary calibration adjusts for threshold voltage shifts due to charge loss, enabling accurate reads without requiring complex real-time compensation circuitry during the read operation itself.
Solution Approach 2:
The memory device performs self-calibration by automatically detecting threshold voltage shifts and adjusting read offsets without external intervention. The auto-read calibration feature enables the memory device to self-correct for charge loss effects, maintaining high reliability without requiring complex external control systems.
2Reliability
If corrective read operations are performed to compensate for threshold voltage shifts, then error rates decrease, but read latency increases due to additional calibration steps
Solution Approach 1:
Auto-read calibration is performed in advance during idle periods or alongside other memory operations, so that when a corrective read is needed, the calibration data is already available. This eliminates the need to perform calibration immediately before each corrective read operation, reducing read latency while maintaining error correction capabilities.
Solution Approach 2:
The patent combines auto-read calibration operations with other memory operations such as program verify or idle periods. By merging the calibration function with existing operational cycles, the system performs necessary calibration without adding separate time overhead, thus reducing overall read latency while maintaining reliability.
3Measurement precision
If parallel auto-read calibration is implemented to identify center voltage between programming distributions, then read accuracy improves, but device complexity increases
Solution Approach 1:
The patent segments the memory array into multiple banks or regions that can be calibrated independently and in parallel. By dividing the memory device into manageable segments, the calibration circuitry complexity is distributed across multiple simpler units rather than requiring one complex centralized calibration system, achieving high precision without excessive overall complexity.
Solution Approach 2:
The auto-read calibration circuitry is designed to be universal and multi-functional, serving both calibration purposes and normal read operations. The same circuitry used for regular read operations is also utilized for calibration, eliminating the need for separate dedicated calibration circuitry and reducing overall device complexity while maintaining high measurement precision.
Data Source
AI summary
Processing logic in a memory device detects a trigger for a corrective read operation on one or more memory cells associated with a selected wordline of a memory array of a memory device and performs an auto-read calibration operation to identify a center voltage. The processing logic further determines a fixed voltage offset with respect to the center voltage, the fixed voltage offset being associated with the corrective read operation, performs a parallel auto-read calibration operation on the fixed voltage offset to identify a calibrated read voltage level, and performs the corrective read operation using the calibrated read voltage level.