Memory Read Voltage Calibration for Charge Loss Compensation
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Solution Overview
Problem
Existing memory devices struggle to accurately differentiate between quick charge loss and the presence of open blocks during read operations, leading to erroneous voltage calibration and increased error rates due to the inability to detect string resistance changes accurately.
Innovation Solution
A detection scheme is implemented to measure string resistance changes and determine whether they are due to quick charge loss or open blocks, adjusting read voltages accordingly by comparing output voltages against a reference voltage and tripping flags at specific voltage levels to differentiate between the two conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If voltage calibration is performed without differentiating between quick charge loss and open blocks, then read operations can be executed, but error rates increase due to erroneous voltage calibration
Solution Approach 1:
The patent applies preliminary anti-action by performing a detection scheme before read operations to identify whether string resistance changes are caused by quick charge loss or open blocks. This preliminary detection prevents erroneous voltage calibration by anticipating and counteracting the potential error source before it affects the read operation, thereby reducing error rates while maintaining read speed.
Solution Approach 2:
The patent implements feedback by using the output of the detection scheme (which identifies the cause of string resistance changes) to adjust the voltage calibration process. The system feeds back the detection results to modify the read voltage application, ensuring that voltage calibration is accurately adapted to the actual condition (quick charge loss vs. open blocks), thus reducing error rates without sacrificing productivity.
2Ease of operation
If string resistance changes are not accurately detected, then read operations can proceed, but voltage calibration becomes erroneous leading to increased error rates
Solution Approach 1:
The patent applies preliminary action by implementing a detection scheme that measures string resistance changes before executing read operations. This preliminary measurement identifies whether changes are due to quick charge loss or open blocks, ensuring accurate voltage calibration is established in advance. This approach maintains operational simplicity while significantly improving measurement precision through the added detection step.
3Device complexity
If quick charge loss is not accurately compensated, then memory device operates without additional complexity, but data retention and reliability deteriorate
Solution Approach 1:
The patent applies segmentation by dividing the compensation mechanism into distinct functional segments: a detection scheme that identifies quick charge loss conditions, a determination logic that distinguishes quick charge loss from open blocks, and a voltage adjustment mechanism that applies specific compensation. This segmented approach enables accurate quick charge loss compensation while keeping each component relatively simple and modular, thus improving data retention without excessive overall complexity.
Data Source
AI summary
Control logic in a memory device initiates a read operation on a memory array of the memory device and performs a calibration operation to detect a change in string resistance in the memory array. The control logic determines whether the change in string resistance is attributable to charge loss in the memory array, and responsive to determining that the change in string resistance is attributable to charge loss in the memory array, preforms the read operation using calibrated read voltage levels to read data from the memory array.