Memory Controller Read Conversion for NAND Error Correction
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Solution Overview
Problem
NAND flash memory devices face challenges in achieving high error correction capability while minimizing resource usage, as hard decision decoding is inefficient and soft decision decoding increases latency and resource consumption.
Innovation Solution
The method involves reading data from memory cells twice using different threshold voltages, converting one set of data using a linear operation, and performing logical operations to generate reliability information for error correction, thereby reducing resource usage while maintaining high error correction capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If soft decision decoding is used to improve error correction capability, then error correction capability is improved, but resource consumption and latency increase
Solution Approach 1:
The patent segments the second read data into multiple second sub-read data, and converts each sub-read data separately using linear operations to generate corresponding sub-conversion information. This segmentation allows the system to process data in smaller units, reducing the computational resources needed at any given time while still achieving comprehensive error correction coverage across the entire data set
Solution Approach 2:
The patent introduces conversion information as an intermediary representation of the read data. By converting read data through linear operations to generate conversion information, the system creates a simplified intermediate form that facilitates more efficient error correction processing, reducing the computational complexity compared to direct soft decision decoding
2Reliability
If soft decision decoding is used to improve error correction capability, then error correction capability is improved, but decoding latency increases
Solution Approach 1:
The patent performs preliminary linear conversion operations on the read data to generate conversion information before the actual error correction decoding process. By pre-processing the data into a converted form that highlights error patterns, the system reduces the computational burden during the critical decoding phase, thereby reducing overall latency while maintaining high error correction capability
Solution Approach 2:
By dividing the data processing into segmented steps (reading, converting to sub-conversion information, then decoding), the patent enables parallel processing and optimization of each stage independently, reducing the total decoding latency compared to monolithic soft decision decoding
3Device complexity
If hard decision decoding is used to reduce resource consumption, then resource usage is reduced, but error correction capability decreases
Solution Approach 1:
The patent uses conversion information as an intermediary that transforms the original read data into a form that is more amenable to efficient hard decision decoding. This conversion process preserves the essential error information while simplifying the data structure, enabling hard decision decoders to achieve better error correction performance than traditional hard decision decoding without requiring the full resource overhead of soft decision decoding
Solution Approach 2:
The patent changes the parameter representation of the read data by applying linear conversion operations. This parameter transformation converts the data into a different domain where error patterns are more distinguishable, allowing hard decision decoding algorithms to achieve higher error correction capability by operating on the converted parameters rather than the original data
Data Source
AI summary
An operating method of a memory controller is provided. The operating method includes receiving a first read data and a second conversion information, the second conversion information including data obtained by converting a second read data based on a linear operation, and the first read data and the second read data including data read from same memory cells; converting the first read data based on the linear operation to generate a first conversion information; performing a logical operation on the first conversion information and the second conversion information to generate an operation information; performing an inverse operation of the linear operation on the operation information to generate a reliability information; and correcting an error of the first read data based on the first read data and the reliability information.