Memory Controller Read Counters for Safe Block Erase
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Solution Overview
Problem
Existing memory systems face inefficiencies in managing garbage collection operations due to the large number of blocks and the need for extensive volatile memory to track uncompleted read operations, leading to increased costs and performance degradation.
Innovation Solution
Implementing a memory controller that uses two access counters to track uncompleted read operations across different time sections, reducing the required volatile memory capacity and enabling efficient garbage collection by ensuring blocks are only erased when no read operations are pending.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory controller tracks uncompleted read operations for all blocks using volatile memory, then read operation reliability is improved, but volatile memory capacity requirements increase significantly
Solution Approach 1:
The patent divides the tracking mechanism into two parts: a counter array in volatile memory for quick access and update, and a status register file (non-volatile or slower memory) for persistent storage. This segmentation allows the system to maintain reliability while reducing the burden on volatile memory capacity.
Solution Approach 2:
The patent introduces an intermediary structure (status register file) that mediates between the volatile memory counter array and the block state information. This intermediary allows the system to track read operations reliably without requiring all tracking data to reside in high-speed volatile memory.
2Reliability
If the memory controller waits for all read operations to complete before erasing blocks, then data integrity is improved, but garbage collection productivity decreases
Solution Approach 1:
The patent implements a feedback mechanism where the counter array continuously monitors the number of uncompleted read operations for each block. When the counter reaches zero, it provides feedback that triggers the erase operation. This automated feedback system ensures data integrity while enabling timely garbage collection.
Solution Approach 2:
The patent performs preliminary actions by pre-initializing the counter array and establishing the tracking mechanism before garbage collection begins. This preliminary setup allows the system to efficiently monitor and respond to read operation completion without delays during the actual garbage collection process.
3Measurement precision
If the memory controller uses a large counter array to track all blocks, then read operation tracking precision is improved, but volatile memory cost increases
Solution Approach 1:
The patent segments the tracking infrastructure into a compact counter array in volatile memory and a status register file in non-volatile or slower memory. This segmentation maintains precise tracking of read operations while significantly reducing the capacity requirements for expensive volatile memory.
Solution Approach 2:
The patent effectively creates a simplified copy of the block state information in the counter array, storing only the essential count of uncompleted read operations in volatile memory, while more detailed status information can be stored elsewhere. This copying approach maintains tracking precision without duplicating all block metadata in high-speed memory.
Data Source
AI summary
According to an embodiment, a memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory includes storage areas. The memory controller counts a first number that is the number of uncompleted requests generated in a first time section for read operations to be executed on a first storage area. In a second time section subsequent to the first time section, the memory controller waits until the first number becomes zero without executing an erase operation on the first storage area while the first number is not zero, and executes the erase operation on the first storage area in response to the first number becoming zero.