Memory Read Data Compression for Single-Channel Bottlenecks
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Solution Overview
Problem
The existing memory systems face a bottleneck phenomenon due to the inefficiency in data transfer through input/output channels, where the amount of read data exceeds the capacity of the channels, leading to performance issues.
Innovation Solution
A memory device with a data receiver, compressor, and output unit that compresses read data chunks from multiple memory areas and outputs them simultaneously through a single channel, using a data compressor to extract bits with a specific logic value and generate compressed data with position information, thereby reducing the data volume and improving transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is read from multiple memory areas through one channel, then data transfer capacity is limited by channel bandwidth, but the amount of read data exceeds the channel capacity causing bottleneck phenomenon
Solution Approach 1:
The patent extracts only the significant bits (bits with logic value '1') from the read data and transmits them through the channel, rather than transmitting all bits. This extraction principle reduces the data volume significantly while preserving the essential information, thereby resolving the bottleneck caused by channel capacity limitations.
Solution Approach 2:
The patent changes the parameter of data representation by encoding position information along with the extracted bits. Instead of transmitting raw binary data, the system transforms the data into a compressed format where each transmitted element includes both the bit value and its position, optimizing the data for efficient channel transmission.
2Productivity
If the number of input/output channels is increased to solve bottleneck phenomenon, then data transfer capacity increases, but device complexity and cost increase
Solution Approach 1:
The patent segments the read data from multiple memory areas into separate data chunks, processes each chunk independently through compression, and then transmits them through a single channel. This segmentation allows parallel processing of multiple memory areas while maintaining a simple single-channel transmission architecture, avoiding the need for multiple channels.
3Productivity
If data is compressed to decrease data amount, then channel bandwidth utilization improves, but additional processing time and complexity are required
Solution Approach 1:
The compression process is performed automatically by the memory device itself without requiring external processing. The data compressor within the memory device independently identifies significant bits, extracts them, adds position information, and prepares the compressed data for transmission, making the system self-sufficient and reducing overall system complexity.
Data Source
AI summary
A memory device may include a data receiver configured to receive a plurality of read data chunks from a plurality of memory areas which transmit and receive data through one channel, a data compressor configured to generate a plurality of compressed data chunks from each of the plurality of read data chunks and a data output unit configured to simultaneously output the plurality of compressed data through the channel in response to a data output command.