Nonvolatile Memory Read Disturb Mitigation via Dynamic Programming Mode

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Solution Overview

Problem

Nonvolatile memory devices face read disturbance issues where un-programmed pages experience threshold voltage distribution shifts due to read operations, leading to potential program failures and the designation of entire memory blocks as 'bad blocks', resulting in reduced memory performance and wasted memory space.

Innovation Solution

Implement methods to check for threshold voltage distribution shifts in un-programmed pages and switch to a lower bit programming mode (M-bit mode) when shifts occur, using verify voltages or counting off-cells to determine the need for mode adjustment, thereby preventing program failures and maintaining memory block functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If read operations are performed on programmed pages, then data access is enabled, but threshold voltage distribution shifts occur in un-programmed pages causing program failures

Engineering Contradiction:
Improvedata access speedVSAvoidprogram operation reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent performs preliminary detection of threshold voltage distribution shifts in un-programmed pages before executing program operations. By checking the threshold voltage distribution in advance and identifying pages that have undergone read disturbance, the system can prevent program failures by avoiding or adjusting programming of affected pages, thus maintaining program operation reliability while allowing continued data access to programmed pages

Inventive Principle:
Principle #10Preliminary action

2Reliability

If entire memory blocks are designated as bad blocks due to read disturbance, then program failures are prevented, but memory space is wasted

Engineering Contradiction:
Improveprogram operation reliabilityVSAvoidmemory space utilization
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent segments the memory block into individual pages and evaluates each page's threshold voltage distribution independently. Instead of designating the entire block as bad when read disturbance is detected, the system identifies only the specific un-programmed pages that have shifted threshold voltage distributions and excludes only those pages from programming. This granular approach maintains program reliability for affected pages while preserving the usability of other pages in the same block, thereby optimizing memory space utilization

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different treatment to different pages within the same memory block based on their individual threshold voltage distribution characteristics. Programmed pages that have not undergone significant read disturbance continue to be used at full capacity, while only the specific un-programmed pages showing threshold voltage shifts are adjusted to lower bit modes or excluded from programming. This localized quality approach ensures reliability where needed while maximizing overall memory space usage

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If N-bit programming mode is used for un-programmed pages, then storage capacity is maximized, but program failures occur due to threshold voltage shifts

Engineering Contradiction:
Improvestorage capacityVSAvoidprogram operation success rate
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent dynamically adjusts the programming mode for un-programmed pages based on their threshold voltage distribution characteristics. Instead of statically using N-bit mode for all pages, the system detects pages that have undergone read disturbance and automatically switches those specific pages to M-bit mode (where M < N) or excludes them from programming. This dynamic adaptation ensures program operation reliability by matching the programming mode to the actual state of each page while maximizing overall storage capacity through selective mode adjustment

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9093171B2Method of operating a nonvolatile memory device having read disturbed page
Publication Date: 2015.07.28 SAMSUNG ELECTRONICS CO LTD
  • US9093171B2 patent drawing
  • US9093171B2 patent drawing
  • US9093171B2 patent drawing

AI summary

A method of operating a nonvolatile memory device by programming pages using a N-bit programming mode until a threshold voltage distribution shift for an un-programmed page in the same memory block is determined, and thereafter programming the un-programmed page using a M-bit programming mode, where M is less than N.