Memory Read Disturb Reduction via Channel Gradient Control
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Solution Overview
Problem
Existing memory devices face challenges in reducing read disturbs during operations, particularly due to channel gradients created during the pre-charge phase of read operations, which can lead to hot electron injection and data state disturbances.
Innovation Solution
The implementation of a read operation process that includes a pre-charge phase with specific voltage signal management, where the voltage signal applied to the drain-side adjacent word line is increased from an initial level to a peak level and then decreased to a reduced level, thereby reducing the channel gradient and likelihood of read disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage signal is applied to drain-side adjacent word line during pre-charge phase, then channel gradient is reduced and read disturb is minimized, but device complexity increases due to multi-stage voltage control
Solution Approach 1:
The pre-charge phase voltage control is segmented into multiple stages: initial voltage level, peak voltage level, and reduced voltage level. This segmentation allows precise control of the voltage signal applied to the drain-side adjacent word line, enabling effective read disturb reduction while managing complexity through structured phase division
Solution Approach 2:
The voltage signal is applied to the drain-side adjacent word line before the main read operation begins. By performing this preliminary action during the pre-charge phase, the channel gradient is reduced in advance, preventing hot electron injection and read disturb before they can occur during the actual read operation
2Reliability
If voltage signal is increased to peak level and then decreased, then electron injection is reduced and data state integrity is maintained, but energy consumption increases due to voltage cycling
Solution Approach 1:
The voltage signal follows a periodic pattern during the pre-charge phase, cycling from initial level to peak level and then decreasing to reduced level. This periodic voltage application effectively controls electron injection and maintains data state integrity while confining energy consumption to a specific time window rather than continuous high voltage application
3Reliability
If channel gradient is reduced during pre-charge phase, then read disturb is minimized, but operation time increases due to additional voltage control steps
Solution Approach 1:
The voltage control steps for reducing channel gradient are merged into the existing pre-charge phase of the read operation. By combining the gradient reduction action with the already-necessary pre-charge timing, the patent minimizes additional time overhead while achieving effective read disturb reduction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes the risk of read disturbs by reducing the channel gradient and electron injection, thereby maintaining the integrity of data states in memory cells during read operations.
Implementation Method 1
channel gradients created during the pre-charge phase of read operations
Implementation Method 2
hot electron injection and data state disturbances
Data Source
Figure 1A~1B
Figure 1C
Figure 2
AI summary
Apparatuses and techniques are described for reducing read disturb in a memory device by reducing the channel gradient and the charge injection to the memory cell. Channels of unselected NAND strings are boosted before reading memory cells in selected NAND strings. The boosting involves applying a positive voltage to source ends and drain ends of the unselected NAND strings, while drain-side select gate transistors are turned on and then off and a voltage signal of non-adjacent word lines of a selected word line, WLn, increases to a read pass voltage. A voltage signal of adjacent word lines of WLn is increased to a peak level to increase the channel conduction for faster read, where the peak level is less than the read pass voltage, decreased to a reduced level to reduce a channel gradient and therefore reduce a read disturb, then increased to the read pass voltage.