Memory System Read Disturb Error Reduction via Hierarchical Block Segmentation
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Solution Overview
Problem
In memory systems with non-volatile memory, read disturb errors occur when reading a word line affects neighboring word lines, leading to data corruption, and existing detection techniques either fail to accurately identify the issue or exacerbate the problem by moving data to new blocks that may also experience read disturb errors due to frequent access.
Innovation Solution
A memory system with a hierarchical block structure, using read counters to identify frequently accessed data, moves it from level one blocks to level two blocks with more counters to track read activity, and then to level three blocks with higher read endurance, allowing for the data to be safely returned to level one blocks when read activity decreases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is moved to a new block when read disturb errors are detected, then the immediate read disturb problem is resolved, but the frequently accessed data continues to cause read disturb errors in the new block
Solution Approach 1:
The patent segments the memory system into multiple hierarchical levels (level one blocks, level two blocks, level three blocks) with different read endurance characteristics. Frequently accessed data is segmented and moved to blocks with higher read endurance, while less frequently accessed data remains in standard blocks. This segmentation allows the system to address read disturb errors by placing hot data in appropriate blocks rather than simply moving all data to new blocks.
Solution Approach 2:
The patent applies local quality by assigning different read endurance properties to different blocks based on access patterns. Level three blocks are specifically designed or selected to have higher read endurance for storing frequently accessed data, while level one blocks maintain standard characteristics for less frequently accessed data. This localized optimization ensures that read disturb errors are minimized at the specific locations where they occur most frequently.
2Measurement precision
If read patrol or read counting techniques are used to detect read disturb errors, then error detection capability is improved, but system complexity and overhead increase
Solution Approach 1:
The patent implements self-service by having the memory system automatically track its own read patterns and identify frequently accessed data through read counters. The system monitors its own operation and autonomously determines which blocks require higher read endurance without requiring external intervention or complex error detection algorithms. This reduces system complexity while maintaining effective read disturb error prevention.
Solution Approach 2:
The patent uses feedback mechanisms where read counters continuously monitor access patterns and provide information about frequently accessed data. This feedback loop allows the system to dynamically adjust data placement, moving hot data to level three blocks when thresholds are exceeded. The feedback approach provides accurate error detection capability while maintaining manageable system complexity through simple counter-based monitoring.
3Object-generated harmful factors
If frequently accessed data is continuously monitored and moved between blocks, then read disturb errors are minimized, but system overhead and operational complexity increase
Solution Approach 1:
The patent implements periodic action by using read counters that increment with each access and compare against thresholds at defined intervals. Rather than continuously monitoring and moving data, the system periodically evaluates access patterns using the counters and performs data movement operations when threshold conditions are met. This periodic approach minimizes read disturb errors while reducing the overhead associated with constant monitoring and data relocation.
Data Source
AI summary
A memory system and method for reducing read disturb errors are disclosed. In one embodiment, a memory system is provided comprising a plurality of blocks of memory and a controller. The controller is configured to detect a read disturb error in a block, identify data that caused the read disturb error, and move the data that caused the read disturb error to a block with a higher read endurance. This can be done by assigning read counters to blocks to determine frequently-read data, and storing that data in a separate block until it is less frequently read and will likely not cause additional read disturb errors.