Nonvolatile Memory Read During Ongoing Programming

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Solution Overview

Problem

Existing memory systems struggle to efficiently respond to read commands when data specified is being programmed, leading to delays in data retrieval due to incomplete programming.

Innovation Solution

The system allows reading of non-volatile memory cells at an intermediate stage of programming by combining partial data from memory cells and latches, enabling rapid response to read commands and resuming programming to complete target threshold voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the system waits for programming to complete before responding to read commands, then data accuracy is ensured, but data retrieval speed deteriorates

Engineering Contradiction:
Improvedata accuracyVSAvoiddata retrieval speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent applies partial action by reading only the portion of data that has been successfully programmed so far, rather than waiting for complete programming. The system determines which memory cells have reached their target threshold voltage and reads only those, providing a partial but useful data set immediately, while the remaining programming continues in the background.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system performs preliminary verification during the programming process to identify which memory cells have successfully reached their target threshold voltage before the programmed time elapses. This preliminary identification allows the system to prepare for immediate reading of available data without waiting for the full programming cycle to complete.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If the system stops programming to read data at an intermediate stage, then data retrieval time is reduced, but programming completeness deteriorates

Engineering Contradiction:
Improvedata retrieval timeVSAvoidprogramming completeness
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The patent maintains continuity of useful action by allowing the programming process to continue in the background after a read operation is performed on partially programmed data. The programming is not terminated but continues until the programmed time elapses, ensuring that the full data set is eventually written while providing early access to available portions.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The system uses feedback from verification operations during programming to determine which memory cells have successfully reached their target threshold voltage. This feedback mechanism allows the system to identify readable data portions dynamically and make informed decisions about when and what to read, ensuring data integrity while enabling early retrieval.

Inventive Principle:
Principle #23Feedback

3Manufacturing precision

If the system performs verification during programming, then programming accuracy is improved, but programming speed deteriorates

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogramming speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent implements periodic verification during the programming process, where verification operations are performed at intervals rather than continuously. This periodic approach balances the need for accuracy (ensuring memory cells reach target threshold voltage) with the need for speed (minimizing interruptions to the programming flow), allowing the system to maintain both programming accuracy and overall programming speed.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12512134B2Nonvolatile memory with ongoing program read
Publication Date: 2025.12.30 SANDISK TECHNOLOGIES LLC
  • US12512134B2 patent drawing
  • US12512134B2 patent drawing
  • US12512134B2 patent drawing

AI summary

An apparatus includes control circuits configured to connect to a plurality of non-volatile memory cells. The control circuits are configured to receive a read command directed to at least one logical page of data during a program operation to store the at least one logical page of data in a plurality of non-volatile memory cells. The control circuits are further configured to stop the program operation at an intermediate stage of programming, read the plurality of non-volatile memory cells at the intermediate stage to obtain first partial data of at least one logical page and obtain the at least one logical page of data by combining the first partial data with second partial data of the at least one logical page stored in data latches.