Memory Controller Read Tuning for ECC Error Correction
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Solution Overview
Problem
Existing memory systems face challenges in maintaining optimal error bit correction capabilities due to changing error characteristics in rewritable non-volatile memory devices, leading to increased system load and inefficiencies in error correction processes.
Innovation Solution
A data reading method that selectively adjusts the log likelihood ratio (LLR) lookup table or threshold voltage of memory cells based on error bit information, partitioning physical pages into bit data areas with varying lengths to optimize error correction, using an ECC frame with a relatively short data length for effective error bit correction and adjusting the LLR or threshold voltage accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction is performed using a fixed LLR lookup table or fixed threshold voltage, then the error correction process is simple, but the error correction capability deteriorates as error characteristics change with erase-program times
Solution Approach 1:
The patent applies dynamics by making the LLR lookup table and threshold voltage adjustable rather than fixed. The memory controller dynamically adapts these parameters based on detected error characteristics from multiple read operations, allowing the error correction system to evolve and maintain optimal performance as error patterns change with erase-program cycles
Solution Approach 2:
The patent implements feedback by using error bit information from ECC operations to adjust the LLR lookup table and threshold voltage. The system continuously monitors error characteristics and uses this feedback to optimize correction parameters, creating a closed-loop system that improves reliability adaptively
2Reliability
If the LLR lookup table is constantly adjusted to match changing error characteristics, then the error correction capability is optimized, but the system load increases drastically
Solution Approach 1:
The patent applies partial action by adjusting the LLR lookup table and threshold voltage based on selected error bit information rather than constantly retraining with all possible error patterns. This selective adjustment approach achieves sufficient adaptation while significantly reducing the computational load compared to exhaustive optimization methods
Solution Approach 2:
The patent changes parameters (LLR values and threshold voltage) based on detected error characteristics rather than maintaining fixed values. This allows the system to adapt to changing error patterns while using efficient parameter adjustment algorithms that minimize processing overhead
3Speed
If fixed threshold voltage is used for reading memory cells, then the reading process is fast and simple, but reading errors increase due to threshold voltage changes from wear, leakage, and disturbance
Solution Approach 1:
The patent applies dynamics by making the threshold voltage adjustable based on error characteristics. Rather than using a fixed threshold, the system dynamically adapts the read threshold voltage according to detected error patterns, maintaining both speed and accuracy by avoiding full retraining while compensating for wear and leakage effects
Data Source
AI summary
A data reading method adapted to a rewritable non-volatility memory module having physical blocks is provided, wherein each physical block has a plurality of physical pages. In the data reading method, each physical page is partitioned into bit data areas, where at least one of the bit data areas has a data length different from that of the other bit data areas. Data is written into the bit data areas. Data in each bit data area is corresponding to an ECC frame. The data is read from the bit data areas. Because the at least one of bit data areas has a relatively short data length, the error correction capability is improved and the data can be correctly read. An error bit information is obtained according to the read data. A log likelihood ratio (LLR) lookup table or a threshold voltage is adjusted according to the error bit information.