Memory Programming Using Read-Error Feedback to Cut RBER

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Solution Overview

Problem

Non-volatile memory devices face issues with read errors that lead to increased latency, reduced performance, and decreased lifetime due to heroic recovery mechanisms and marking of blocks as bad, affecting effective overprovisioning and write amplification.

Innovation Solution

Adjusting program verify levels and voltages based on previous read errors to reduce uncorrectable bit error rates, thereby minimizing the need for heroic recovery and conserving storage capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If heroic recovery mechanism is applied to recover uncorrectable read errors, then data recovery capability is improved, but read latency increases significantly and read performance decreases

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidread latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by adjusting program verify levels and voltages based on prior read errors before new write operations occur. This proactive adjustment prevents future read errors from occurring in the first place, eliminating the need for heroic recovery mechanisms and their associated latency penalties.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback by using information from prior read errors to adjust subsequent program verify levels. The controller analyzes read error patterns and modifies programming parameters accordingly, creating a closed-loop system that continuously improves reliability without requiring costly recovery operations.

Inventive Principle:
Principle #23Feedback

2Reliability

If heroic recovery mechanism is applied to recover read errors, then data recovery capability is improved, but quality of service decreases

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidread performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By performing preliminary adjustments to program verify levels based on prior errors, the system prevents read errors before they occur, maintaining high read performance without the need for heroic recovery operations that degrade quality of service.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The feedback mechanism uses read error information to optimize future programming operations, ensuring data is written with sufficient margin to prevent read errors, thereby maintaining high read performance and quality of service.

Inventive Principle:
Principle #23Feedback

3Ease of manufacture

If blocks are marked as bad due to uncorrectable read errors, then data recovery is simplified, but effective overprovisioning decreases and write amplification increases

Engineering Contradiction:
Improvedata recovery simplificationVSAvoidwrite performance
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The system performs preliminary programming adjustments to prevent read errors before they occur, eliminating the need to mark blocks as bad and preserving effective overprovisioning, which in turn maintains high write performance and reduces write amplification.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By using feedback from read error analysis to adjust program verify levels, the system prevents read errors that would otherwise lead to block marking, thereby preserving storage capacity and maintaining optimal write performance.

Inventive Principle:
Principle #23Feedback

4Reliability

If program verify levels are adjusted based on prior read errors, then uncorrectable bit error rate is reduced, but device complexity increases

Engineering Contradiction:
Improveuncorrectable bit error rateVSAvoidcontroller complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system changes programming parameters (program verify levels and voltages) based on analyzed read error patterns. This parameter adjustment approach is straightforward and implementable, improving reliability without requiring complex architectural changes to the storage device.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250348223A1Adjusted programming associated with read errors
Publication Date: 2025.11.13 MICROCHIP TECHNOLOGY INC
  • US20250348223A1 patent drawing
  • US20250348223A1 patent drawing
  • US20250348223A1 patent drawing

AI summary

In some implementations, a storage device may perform a read operation using a first read voltage. The storage device may identify a read error associated with the read operation. The storage device may identify a difference between the first read voltage and a second read voltage, the second read voltage associated with a reduced raw bit error rate (RBER). The storage device may perform a write operation using a program verify voltage that is based on the difference.