Semiconductor Memory Read Latency During Program Operation
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Solution Overview
Problem
Semiconductor memory devices face high read latency when a read command is input during a program operation, as existing technologies do not efficiently manage the transition between programming and reading operations.
Innovation Solution
The semiconductor memory device includes a program and read unit, along with a control unit that generates control signals to manage the transition between programming and reading by stopping the program operation when a read command is input, allowing for immediate read operation without the need for a separate latch for data storage, thereby reducing read latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a read command is input during a program operation in existing semiconductor memory devices, then the read operation must wait for the program operation to complete, but this causes high read latency
Solution Approach 1:
The patent applies preliminary action by preparing the read data in advance during the program operation. Specifically, while the program operation is ongoing, the first bit data of the program data is pre-loaded and stored in the page buffer, so that when a read command is received, the read operation can immediately use this pre-prepared data without waiting for the program operation to complete, thereby reducing read latency
Solution Approach 2:
The patent segments the program data into multiple bits (first bit data, second bit data, etc.) and processes them separately. The first bit data is extracted and stored in the page buffer during the program operation, while the remaining bits continue to be programmed. This segmentation allows the read operation to access the first bit data independently without being blocked by the ongoing program operation of other bits
2Loss of time
If a latch is added to the page buffer for storing program data during read operations, then read latency is reduced, but the page buffer size and device complexity increase
Solution Approach 1:
The patent makes the page buffer multi-functional by enabling it to serve both as a temporary storage for read data and as a storage for the first bit data of program data during ongoing program operations. This eliminates the need for a separate latch structure, as the page buffer itself is configured to handle both functions, thereby reducing device complexity while maintaining low read latency
Solution Approach 2:
The patent merges the function of the latch (for storing program data) with the page buffer (for storing read data). Instead of having separate storage structures, the page buffer is designed to simultaneously hold both read data and the first bit data of program data, combining multiple storage functions into a single structure and thereby simplifying the overall device architecture
Data Source
AI summary
A semiconductor memory device includes a program and read unit suitable for programming program data in a memory cell array and for reading read data stored in the memory cell array, and a control unit suitable for generating a control signal for controlling the program and read unit in response to a command input from the outside of the semiconductor memory device, in which the control unit controls the program and read unit to read the read data in a state of storing a first bit data of the program data when a read command is input while programming the program data.