Memory Subsystem Read Latency Reduction via Partition Command Scheduling

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Solution Overview

Problem

Conventional memory sub-systems experience increased latency due to synchronous operation methods, where read commands result in higher latency compared to write commands, leading to inefficiencies in partition command scheduling.

Innovation Solution

Incorporating a configurable read partition command queue timeout threshold and a write threshold to determine when to switch from servicing write commands to read commands, allowing the arbiter to manage the sequencer component's operation effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If synchronous operation method is used to service commands, then command processing is simplified, but read command latency increases

Engineering Contradiction:
Improvecommand processing complexityVSAvoidread command latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The command processing is segmented into separate read and write command queues, allowing independent processing of read and write commands. The arbiter selectively services commands from either queue based on current workload conditions, enabling optimized processing for each command type without forcing synchronous execution for all commands.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between servicing read commands and write commands based on configurable thresholds. The arbiter monitors the state of both queues and transitions between processing modes when threshold conditions are met, creating a dynamic command processing approach that adapts to varying workload patterns.

Inventive Principle:
Principle #15Dynamics

2Productivity

If write commands are serviced continuously, then write throughput is maintained, but read command latency increases

Engineering Contradiction:
Improvewrite throughputVSAvoidread command latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The arbiter uses feedback from monitoring command queue states and configurable thresholds to determine when to switch between servicing write commands and read commands. This feedback mechanism ensures that write throughput is maintained when write commands are abundant, while read commands are serviced promptly when their latency threshold is reached.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system changes processing parameters by switching between different command service modes based on threshold conditions. When the read command queue timeout threshold is met or write queue depth threshold is reached, the arbiter changes the service parameter from continuous write processing to mixed or read-only processing, optimizing performance for current workload conditions.

Inventive Principle:
Principle #35Parameter changes

3Loss of time

If read commands are serviced immediately, then read latency is reduced, but write command processing is delayed

Engineering Contradiction:
Improveread command latencyVSAvoidwrite command throughput
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The system applies partial action by servicing only a subset of commands based on threshold conditions. Rather than immediately servicing all read commands, the arbiter waits for configurable threshold conditions to be met (such as read queue timeout or write queue depth thresholds) before switching to read command processing, thereby balancing read latency reduction with write throughput maintenance.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20240143232A1Reduce read command latency in partition command scheduling at a memory device
Publication Date: 2024.05.02 MICRON TECHNOLOGY INC
  • US20240143232A1 patent drawing
  • US20240143232A1 patent drawing
  • US20240143232A1 patent drawing

AI summary

A partition command from one of a plurality of write partition command queues or a plurality of read partition command queues is received. The received partition command is issued to a command processor of the sequencer component to be applied to one of the one or more memory devices. Responsive to receiving the partition command of the plurality of write partition command queues, whether a timeout threshold criterion pertaining to the plurality of read partition command queues is satisfied is determined. Responsive to determining that the timeout threshold criterion pertaining to the plurality of read partition command queues is not satisfied, whether a write threshold criterion pertaining to the plurality of write partition command queues is satisfied is determined. Responsive to determining that at least one of the timeout threshold criterion pertaining to the plurality of read partition command queues or the write threshold criterion pertaining to the plurality of write partition command queues is satisfied, partition commands of the plurality of read partition command queues is received.