Memory Read-Level Adaptation for Faster Error Recovery

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Solution Overview

Problem

Memory systems experience increased latency and reduced efficiency due to the need for multiple read operations to identify the accurate read level of degraded memory cells, either through brute force methods or predefined gap adjustments, which often overshoot the correct read level.

Innovation Solution

The memory system incrementally adjusts read levels based on information from previous read levels using learning rate and momentum parameters, employing an adaptive movement estimation (ADAM) procedure to identify the accurate read level efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple read operations are performed using brute force methods or predefined gap adjustments to identify the accurate read level, then the read level identification can be achieved, but latency increases and efficiency decreases

Engineering Contradiction:
Improveread level identification accuracyVSAvoidlatency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where the read level identification process uses the outcome of each read operation to adjust subsequent read levels. The system monitors read results and dynamically modifies the read level progression, avoiding the need for exhaustive brute force searches and preventing overshooting of the accurate read level, thereby reducing latency while maintaining identification accuracy.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces dynamic adjustment of read levels based on real-time system state. Instead of using fixed predefined gaps, the read level increment is dynamically modified according to the degradation pattern detected during reading operations. This dynamic approach allows the system to adapt to different memory cell degradation states, reducing the number of operations needed to identify the accurate read level.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If multiple read operations are performed to identify the accurate read level of degraded memory cells, then read level identification can be achieved, but efficiency is reduced

Engineering Contradiction:
Improveread level identification accuracyVSAvoidefficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent performs preliminary actions by initializing the read level identification process with optimized starting parameters and degradation patterns. The system prepares the read level adjustment strategy in advance based on memory cell characteristics, avoiding unnecessary trial-and-error operations. This preliminary preparation enables faster convergence to the accurate read level, improving overall efficiency without sacrificing identification accuracy.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If predefined gap adjustments are used to modify read levels, then the read level can be adjusted systematically, but the accurate read level may be overshooted

Engineering Contradiction:
Improveread level adjustment systematicityVSAvoidread level identification accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent replaces fixed predefined gap adjustments with dynamic read level modifications. The system continuously adapts the read level increment based on feedback from each reading operation and the detected degradation pattern. This dynamic approach maintains systematic adjustment while preventing overshooting of the accurate read level, as the adjustment step size is modulated in real-time according to the actual memory cell state.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback control where each read operation's result informs the next read level adjustment. The system monitors whether the current read level is approaching or has passed the accurate read level and modifies subsequent adjustments accordingly. This feedback mechanism ensures systematic operation while maintaining precision, preventing the overshooting problem associated with fixed gap adjustments.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12579023B2Enhanced error handling in memory systems
Publication Date: 2026.03.17 MICRON TECHNOLOGY INC
  • US12579023B2 patent drawing
  • US12579023B2 patent drawing
  • US12579023B2 patent drawing

AI summary

Methods, systems, and devices for enhanced error handling in memory systems are described. A memory system may enter a read error handling procedure to recover data from a memory cell. For example, the memory system may perform multiple read operations at respective first read levels to identify a voltage valley associated with the data in the memory cell. Based on identifying the voltage valley, the memory system may read the data from the memory cell according to a second read level, where the second read level may be based on one of the first read levels, a first learning rate parameter, and a first momentum parameter. The memory system may determine whether to exit the error handling procedure or continue with the error handling procedure based on whether the data was successfully decoded in response to the read operation at the second read level.