Memory Read-Out Circuit Using Reliability Information for Error Correction
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Solution Overview
Problem
Memory systems face challenges in accurately reading and correcting errors due to noise, electrical disturbances, and aging effects, which lead to corrupted data, especially in multi-level memory cells where the separation of bit line voltage distributions becomes increasingly difficult.
Innovation Solution
The implementation of a memory system that includes a read-out circuit and a data processor configured to derive payload data using reliability information, which adapts to the age of memory cells and employs error detection and correction methods such as Trellis decoding and linear block codes, and utilizes soft information to enhance error correction capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level memory cells are used to increase storage capacity, then storage density is improved, but the separation of bit line voltage distributions becomes increasingly difficult leading to higher error rates
Solution Approach 1:
The patent applies preliminary action by performing multiple read operations on the same memory cell before final data extraction. The system reads the memory cell multiple times with different reference voltages, collects voltage distribution information in advance, and uses this preliminary data to determine the most likely stored value. This pre-collection of measurement data enables more accurate interpretation of multi-level cell states despite overlapping voltage distributions.
Solution Approach 2:
The patent implements feedback by using the results of initial read operations to adjust subsequent read operations. The system analyzes the voltage distribution from first reads, uses this information to refine reference voltage selections for second reads, and continuously adjusts the reading strategy based on accumulated evidence. This feedback loop allows the system to adapt to the actual voltage distributions and improve measurement precision iteratively.
2Reliability
If error correction methods are implemented to handle noise and aging effects, then data reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by enabling the memory system to automatically perform error detection and correction without external intervention. The system inherently collects reliability information during normal read operations, automatically analyzes voltage distributions to detect errors, and corrects data using embedded error correction algorithms. This self-service approach improves data reliability while minimizing the need for additional complex external error correction hardware.
Solution Approach 2:
The patent implements universality by designing a read-out circuit that performs multiple functions: normal data reading, voltage distribution analysis, error detection, and error correction. The same circuit infrastructure is used for both standard memory operations and reliability enhancement, allowing the system to achieve improved data accuracy without proportionally increasing device complexity. The multi-functional design integrates error correction capabilities into the existing memory architecture.
3Reliability
If multiple read operations are performed to collect reliability information, then error correction capability is improved, but read time increases
Solution Approach 1:
The patent applies partial action by performing a limited number of read operations (typically two) rather than exhaustive repeated reads. The system collects sufficient reliability information from these partial reads to make confident error correction decisions, avoiding unnecessary additional reads. This partial action approach provides adequate error correction capability while constraining the time penalty to a manageable level.
Solution Approach 2:
The patent uses preliminary action by collecting reliability information during the read process itself rather than requiring separate error correction passes. The voltage distribution data gathered during initial read operations is immediately utilized for error detection and correction decisions, eliminating the need for additional time-consuming analysis steps after the reads are completed. This integrates the error correction preparation into the reading process efficiently.
Data Source
AI summary
A memory system having a plurality of memory cells for storing payload data and redundancy data. The memory system having a read-out circuit configured to read-out a status of the plurality of memory cells, the read-out status having payload data, redundancy data and associated reliability information. Moreover, the memory system has a data processor configured to derive the payload data from the read-out status using the reliability information.