Configurable Memory Device Read Polarity for Process Variation Compensation
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Solution Overview
Problem
The high sensitivity of selector-based resistive memory devices to process variations complicates large-scale fabrication of memory devices with desired performance, as the performance is dependent on both the resistive memory element and the bipolar selector, making uniform and efficient read access challenging.
Innovation Solution
Implementing a method that allows memory devices to be configured with either a first or second read scheme based on the sensing polarity, enabling uniform manufacturing and subsequent configuration for optimal read performance, which can be achieved through structural modifications or programming of control circuitry, allowing for either a common sensing polarity or different schemes for subsets of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a selector-based resistive memory device is used to achieve high-density storage and reduced leakage currents, then memory cell performance is improved, but sensitivity to process variations increases making high-yield fabrication more challenging
Solution Approach 1:
The patent applies parameter changes by configuring memory cells to operate with different read polarities (first polarity and second polarity) to compensate for process variations. By adjusting the operating parameters (read voltage polarity) based on process variations, the system maintains desired performance characteristics across large-scale fabrication while preserving the benefits of selector-based memory cells for high-density storage and low leakage currents.
2Productivity
If uniform manufacturing of memory devices is implemented, then fabrication yield is improved, but read performance optimization becomes more challenging due to process variations
Solution Approach 1:
The patent implements dynamics by enabling flexible configuration of read polarity for different memory cells or groups of memory cells. Instead of a fixed read scheme, the system dynamically assigns read polarities based on process variation measurements, allowing uniform manufacturing to proceed at high yield while maintaining optimized read performance through post-fabrication configuration.
Solution Approach 2:
The patent uses parameter changes by adjusting the read voltage polarity parameter for different memory cells to compensate for process variations. This allows uniform manufacturing processes to produce high-yield devices while the configurable polarity parameter optimizes read performance for each cell or group based on its specific process characteristics.
3Reliability
If different read schemes are implemented for different memory cells, then read performance is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing memory cells into different groups or subsets, where each group can be configured with an optimal read polarity. This segmentation approach allows different read schemes to be implemented for different memory cell groups, improving overall read performance while managing device complexity through organized, modular configuration rather than individual cell customization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of memory devices with improved read margins and reduced leakage currents, facilitating high-yield large-scale fabrication and enhancing read reliability by optimizing read performance characteristics based on sensing polarity.
Implementation Method 1
The resistive memory elements may be switched between a higher resistance and a lower resistance state by applying appropriate write currents/voltages via the bit line and word lines
Implementation Method 2
The bi-polar selector may block current (i.e. present a high resistance to current) for voltages below a threshold and allow current (i.e. present a low resistance to current) for voltages above the threshold
Implementation Method 3
The state of a resistive memory element may be read by applying a read voltage to the resistive memory element and sensing the state using a sense amplifier
Data Source
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AI summary
According to an aspect of the present inventive concept there is provided a method for configuring a memory device, the memory device comprising: a plurality of memory cells, wherein each memory cell comprises a resistive memory element and a bipolar selector connected in series between a respective pair of first and second access lines, sense amplifier circuitry connected to the plurality of first access lines and/or to the plurality of second access lines, and the method comprising performing a read mode configuration comprising configuring the memory device such that (subsequent to the read mode configuration) each memory cell, when selected to be read, is read in accordance with one of a first and a second read scheme, wherein: the first read scheme comprises: applying a first read voltage across a selected memory cell, such that a read current of a first polarity is passed through the selected memory cell, and sensing a resistive state of the resistive memory element of the selected memory cell using the sense amplifier circuitry, and the second read scheme comprises: applying a second read voltage across a selected memory cell, such that a read current of a second polarity opposite to the first polarity is passed through the selected memory cell, and sensing a resistive state of the resistive memory element of the selected memory cell using the sense amplifier circuitry.