Memory Controller Read Reassembly for Variable-Length NVM Access

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Solution Overview

Problem

Existing memory access technologies waste bus bandwidth and affect system performance by requiring multiple read commands for data of varying lengths, leading to inefficiencies in command handling and increased wear leveling work.

Innovation Solution

A computer system and method that supports read commands for obtaining data of different lengths by using a memory controller to send multiple commands for data subblocks, accompanied by metadata for reassembly, reducing the need for additional read commands and optimizing bus usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the memory controller sends multiple fixed-length read commands to read data of varying length, then the data can be read from NVDIMM, but the bus bandwidth is wasted and system performance is affected

Engineering Contradiction:
Improvesystem performanceVSAvoidbus bandwidth waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent segments data of varying length into fixed-length data blocks (e.g., 64B blocks). When reading data longer than the fixed length, the memory controller divides it into multiple blocks and sends separate read commands for each block. Metadata is used to track the original data boundaries and reassemble the segmented blocks into the complete original data, thus eliminating bus bandwidth waste while maintaining compatibility with fixed-length command protocols.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If the memory controller changes access requests for 64B data to 128B read commands, then the command can be sent to NVDIMM, but the data bus bandwidth is wasted

Engineering Contradiction:
Improvecommand compatibilityVSAvoiddata bus bandwidth waste
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent applies partial action by reading only the necessary portion of data. Instead of always reading the full fixed length (e.g., 128B), the system reads exactly the required amount of data (e.g., 64B) by using metadata to indicate the actual data length within the fixed-length block. This eliminates unnecessary data transmission and optimizes data bus bandwidth utilization.

Inventive Principle:
Principle #16Partial or excessive action

3Adaptability or versatility

If the processor sends access requests for reading data with different length, then the read requirement is met, but the memory controller needs to handle multiple command transformations

Engineering Contradiction:
Improvedata length flexibilityVSAvoidcommand handling complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces metadata as an intermediary between the variable-length data requests from the processor and the fixed-length command protocol of NVDIMM. The metadata contains information about the original data length, block segmentation, and reassembly instructions. This intermediary layer simplifies command handling by providing a standardized interface while maintaining adaptability to different data lengths through the metadata structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4152166B1Memory access technology and computer system
Publication Date: 2026.03.04 HUAWEI TECH CO LTD
  • EP4152166B1 patent drawingFigure 1
  • EP4152166B1 patent drawingFigure 2~3
  • EP4152166B1 patent drawingFigure 4~5

AI summary

This application provides a memory access technology and a computer system. The computer system includes a memory controller, a media controller, and a non-volatile memory NVM connected to the media controller. After receiving a first read command that is sent by the memory controller, the media controller may read first data from the NVM based on a first address in the first read command. Then the media controller can return, to the memory controller, at least two fixed-length data subblocks and metadata of the at least two data subblocks based on at least two send commands sent by the memory controller. The metadata includes a location identifier that is used to indicate an offset of a corresponding data subblock in the first data. The memory controller combines the at least two data subblocks into the first data based on location identifiers in the metadata of the at least two data subblocks.