Memory Read Error Correction via Dynamic Reference Adjustment
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Solution Overview
Problem
Nonvolatile memory integrated circuits face errors in data reading due to unforeseen charge gain or loss, which existing error correction and detection algorithms are insufficient to handle beyond a limited number of incorrect bits.
Innovation Solution
A method involving generating and comparing check codes to adjust the read bias arrangement and reference values, iteratively changing these parameters to ensure agreement between the check codes and data bits, thereby distinguishing between logical levels and correcting errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction and detection algorithms are used to handle incorrect bits, then data reliability is improved, but the algorithms are insufficient when the number of incorrect bits exceeds a limited threshold
Solution Approach 1:
The patent applies dynamics by making the read reference adjustable rather than fixed. The system dynamically changes the read reference based on detected errors, allowing it to adapt to different error conditions. Specifically, the read reference is modified iteratively to compensate for charge loss or gain in memory cells, enabling the system to handle errors that would otherwise exceed the capability of static error correction algorithms.
Solution Approach 2:
The patent changes the parameter of the read reference (voltage or current level) to correct reading errors. By adjusting the read reference parameter in response to detected discrepancies between stored check codes and newly generated check codes, the system can compensate for threshold voltage shifts caused by charge loss or gain, thereby extending error handling capability beyond traditional algorithmic limits.
2Reliability
If a margin separates threshold voltage ranges to account for charge gain or loss, then data integrity is improved, but errors still occur when threshold voltage shifts exceed the margin
Solution Approach 1:
The patent implements feedback by using check codes stored in the memory to verify the accuracy of read operations. When a discrepancy is detected between the stored check code and the newly generated check code from the read operation, the system feeds this error information back to adjust the read reference, creating a closed-loop system that continuously optimizes reading accuracy despite threshold voltage drift.
Solution Approach 2:
The patent applies preliminary action by pre-storing check codes in the memory alongside the data. These check codes are generated before the actual data reading operation and stored with the data bits. This preliminary preparation enables the system to detect and correct errors during the read operation by comparing the stored check codes with newly generated ones, allowing error correction to occur proactively rather than reactively.
Data Source
AI summary
In response to a disagreement between a previously generated check code associated with previously programmed data bits and a more recently generated check code generated in response to a read command, the comparison process is changed, between i) a value representing accessed data and ii) a reference applied to such accesses to distinguish between logical levels. For example, the read bias arrangement and/or a read reference of a memory integrated circuit is changed.