Nonvolatile Memory Read Refresh Voltage Cycling
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Solution Overview
Problem
Nonvolatile memory devices face challenges in minimizing disturbance between memory cells due to repetitive access, leading to increased threshold voltage, which affects data retention and storage reliability.
Innovation Solution
A read refresh operation is performed by consecutively driving word lines in a memory block at two different voltage levels and then discharging them, minimizing negative boosting and maintaining select lines at appropriate voltage levels to manage the channel potential.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If repetitive read operations are performed on memory blocks, then data access speed is improved, but disturbance between memory cells increases causing threshold voltage to rise
Solution Approach 1:
The patent implements periodic read refresh operations where word lines are periodically driven at different voltage levels and discharged to ground. This periodic action prevents the accumulation of disturbance effects from repetitive read operations, thereby maintaining threshold voltage stability and ensuring data retention reliability while allowing frequent data access.
Solution Approach 2:
The patent applies preliminary anti-action by performing read refresh operations before data retention is compromised. The controller proactively drives word lines at different voltage levels and discharges them to ground to counteract the disturbance effect before it causes significant threshold voltage shifts, thereby preventing data retention failures.
2Measurement precision
If word lines are driven at high voltage levels for read operations, then read operation effectiveness is improved, but negative boosting and disturbance between memory cells increase
Solution Approach 1:
The patent employs periodic action by alternating word line voltage levels during read refresh operations. Word lines are driven at a first voltage level, then discharged to ground, then driven at a second voltage level, and discharged again. This periodic voltage variation effectively reduces negative boosting and disturbance between memory cells while maintaining read operation effectiveness.
Solution Approach 2:
The patent applies parameter changes by varying the voltage level applied to word lines over time. The controller drives word lines at different voltage levels (first voltage level and second voltage level) during read refresh operations, changing the electrical parameters to minimize disturbance effects and negative boosting while preserving read effectiveness.
3Reliability
If read refresh operation is implemented to reduce disturbance, then data retention is improved, but operation complexity increases
Solution Approach 1:
The patent applies universality by implementing the read refresh operation using the existing read operation circuitry and control mechanisms. The same word lines, bit lines, and control circuits used for normal read operations are utilized for read refresh operations, eliminating the need for additional dedicated hardware and minimizing operational complexity while improving data retention.
Solution Approach 2:
The patent implements self-service by enabling the memory device to perform its own refresh operations without external intervention. The controller automatically manages the read refresh process, selecting target memory blocks and executing the voltage level changes and discharges based on internal timing and access patterns, thereby maintaining data retention without adding complex external control requirements.
Data Source
AI summary
A memory system includes: a nonvolatile memory device including a plurality of memory blocks each including a plurality of memory cells coupled to a plurality of word lines; and a controller configured to control the nonvolatile memory device to perform a read operation on the plurality of memory blocks, wherein the read operation includes: a first operation of supplying a first voltage level to the plurality of word lines, a second operation of discharging the plurality of word lines to a second voltage level, a third operation of supplying a third voltage level less than the first voltage level to the plurality of word lines, and a fourth operation of discharging the plurality of word lines to a fourth voltage level.