Semiconductor Memory Read Standby Mode for Power Reduction
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Solution Overview
Problem
Current semiconductor memory devices face inefficiencies in read operations due to high operating currents and power consumption, particularly when multiple read operations are performed on the same memory block, as they require significant charge for word line charging.
Innovation Solution
The implementation of a read standby mode that applies a standby voltage to the word lines after the initial read operation, reducing the charge needed for subsequent read operations by maintaining the word lines at a higher voltage than ground, thus lowering operating currents and reducing the time required for read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple read operations are performed on the same memory block using conventional methods, then read operations can be completed, but high operating currents and power consumption occur due to repeated word line charging
Solution Approach 1:
The patent applies preliminary action by pre-charging the word line to a standby voltage level before the actual read operation. This preliminary voltage preparation reduces the charging time and current required during subsequent read operations on the same memory block, thereby lowering power consumption while maintaining read speed efficiency
Solution Approach 2:
The patent implements dynamics by transitioning the word line between different voltage states - a ground level standby state and an active read state. By dynamically switching between these states and using a read standby mode that maintains intermediate voltage levels, the system optimizes the balance between power consumption and read operation performance
2Productivity
If multiple read operations are performed on the same memory block, then data can be accessed repeatedly, but the time required for word line charging increases overall operation time
Solution Approach 1:
The read standby mode performs preliminary voltage preparation by maintaining the word line at an elevated standby voltage between read operations. This preliminary action eliminates the need for full re-charging during subsequent reads, significantly reducing the time loss associated with repeated word line charging while maintaining high read throughput
3Ease of operation
If conventional read operations are used, then read functionality is provided, but significant heat generation occurs due to high operating currents
Solution Approach 1:
The patent applies periodic action by implementing a read standby mode that alternates between active read operations and low-power standby states. During the standby period, the word line maintains an intermediate voltage rather than being fully charged, creating a periodic pattern of high and low power consumption that reduces average heat generation while preserving complete read functionality when needed
Data Source
AI summary
A semiconductor memory device includes a memory string, first wirings electrically connected to the memory string, second wirings electrically connected to the first wirings, transistors electrically connected between the first wirings and the second wirings, and a third wiring connected to gate electrodes of the transistors in common. The memory string includes memory transistors connected in series. Gate electrodes of the memory transistors are connected to the first wirings. The semiconductor memory device executes a first read operation in response to an input of a first command set, and executes a second read operation in response to an input of a second command set. A first voltage that turns the transistors ON is applied to the third wiring from an end of the first read operation to a start of the second read operation.