Memory Read Strobe Control for Synchronized Bank and Channel Output
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Solution Overview
Problem
There is a need to coordinate the amount of data read for consistent memory device output, particularly in memory devices where bank area strobe signals process varying numbers of bytes, while channel area strobe signals process fewer data units, leading to inefficiencies.
Innovation Solution
Implementing control circuitry to disable alternate bank strobe signals and maintain channel strobe signals to synchronize timing, ensuring consistent data processing across memory areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If bank area strobe signals process varying numbers of bytes while channel area strobe signals process fewer data units, then data processing capacity is increased, but data synchronization and output consistency deteriorate
Solution Approach 1:
The patent implements dynamic control of strobe signals by selectively enabling or disabling bank strobe signals based on the specific read operation being performed. The control circuitry adjusts which bank strobe signals are active to match the data width requirements of different operations, allowing the system to adapt between processing varying numbers of bytes in the bank area while maintaining synchronization with the channel area.
Solution Approach 2:
The patent applies different strobe signal configurations to different areas of the memory device. Bank area strobe signals are configured to process varying numbers of bytes (e.g., 1, 2, 4, or 8 bytes) based on operation requirements, while channel area strobe signals maintain a consistent configuration. This local differentiation allows optimized data processing capacity in the bank area while preserving synchronization through the channel area.
2Reliability
If alternate bank strobe signals are disabled to synchronize timing, then data synchronization is improved, but device complexity increases
Solution Approach 1:
The control circuitry is pre-configured with knowledge of the required data width for different read operations. Before initiating a read operation, the control circuitry selectively enables or disables specific bank strobe signals based on the anticipated data width requirements. This preliminary configuration avoids the need for complex real-time adjustments during operation, reducing overall control complexity while maintaining synchronization.
Solution Approach 2:
The patent introduces control circuitry as an intermediary between the read operation commands and the strobe signal generation. This intermediary layer manages the complexity of coordinating multiple bank strobe signals with channel strobe signals, translating high-level read operation requirements into specific strobe signal activation patterns. The control circuitry absorbs the complexity burden, allowing the rest of the memory device to operate with simpler, more reliable signal timing.
Data Source
AI summary
A system includes memory having a bank area and a channel area. The system further includes control circuitry to receive a command to access the memory. Responsive to receiving the command to access the memory, the control circuitry can provide a bank strobe signal for accessing memory in the bank area and at least two channel strobe signals for accessing memory in the channel area. The channel strobe signal may process a smaller amount of data than that processed by the bank strobe signal.