Semiconductor Memory Read Circuit Switching Control
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in operating a large number of read circuits simultaneously without deteriorating data reading reliability, particularly due to the need for numerous reference cells and interference issues with sense amplifiers, which complicates input-output compatibility and increases the area required for read circuits.
Innovation Solution
The implementation of a semiconductor memory device with a read circuit that includes a voltage comparison unit, first and second switch circuits, and current-voltage conversion circuits, allowing for the electrical separation of sense and reference currents and voltages, enabling multiple read circuits to share a single reference voltage and preventing interference, thus reducing the need for additional reference cells and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a large number of read circuits are placed to achieve high-speed read operation, then productivity is improved, but device complexity increases due to large area requirements
Solution Approach 1:
The reference voltage generation circuit is designed to serve multiple read circuits simultaneously. A single reference voltage can be shared by multiple read circuits through appropriate switching control, eliminating the need for dedicated reference cells for each read circuit and significantly reducing the overall area required.
Solution Approach 2:
Multiple read circuits are merged to share common resources including the reference voltage generation circuit and reference cells. By combining the reference voltage paths of multiple read circuits into a single shared path with multiplexing control, the patent reduces redundancy and minimizes the total number of components required.
2Reliability
If reference cells are provided for each read circuit, then reliability is improved, but device complexity increases due to increased number of components
Solution Approach 1:
A single reference voltage generation circuit serves multiple read circuits through time-division multiplexing. The reference voltage is sequentially provided to different read circuits based on control signals, allowing one reference cell to functionally replace multiple dedicated reference cells while maintaining reliable operation.
Solution Approach 2:
A voltage comparison unit acts as an intermediary between the reference voltage generation circuit and the read circuits. This intermediary component compares the sense voltage from memory cells with the reference voltage, enabling reliable data reading without requiring direct electrical connection between each read circuit and its own dedicated reference cell.
3Productivity
If sense amplifiers operate simultaneously in multiple read circuits, then productivity is improved, but harmful factors increase due to interference between circuits
Solution Approach 1:
The patent segments the reference voltage distribution by providing separate reference voltage paths for different read circuits through switching control. This segmentation prevents electrical interference between simultaneously operating read circuits while allowing them to share the common reference voltage generation resource, enabling parallel operation without mutual disruption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for the simultaneous operation of numerous read circuits without compromising data reading reliability, reduces the number of reference cells required, and enhances the occupancy rate of memory cells for data reading and writing, while maintaining reliable data integrity.
Implementation Method 1
a memory element that stores data based on change in resistance values
Implementation Method 2
a voltage comparison unit that compares a sense current flowing through the selected cell with a reference current flowing through the reference cell
Data Source
AI summary
A semiconductor memory device of the present invention comprises a memory array and a read circuit that reads data of a selected cell. The memory array includes a plurality of memory cells and a reference cell each having a memory element that stores data based on change in resistance value. The read circuit includes: a voltage comparison unit that compares a value corresponding to a sense current from the selected cell with a value corresponding to a reference current from the reference cell; a first switch; and a second switch. Both of the first and second switches are provided at a subsequent stage of a decoder and at a preceding stage of the voltage comparison unit. The second switch circuit controls input of the value corresponding to the sense current to the voltage comparison unit, while the first switch circuit controls input of the value corresponding to the reference current to the voltage comparison unit.