Memory Read-Threshold Prediction for Lower Read-Retry Latency

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Solid state memory storage with advanced multi-level cell techniques experiences significant performance degradation due to a large number of read-retry operations, which increase read latency and fail to meet stringent quality-of-service (QoS) requirements.

Innovation Solution

Utilizing a deep neural network (DNN) to track read voltage thresholds without additional reads, leveraging a large number of host reads to generate an updated read threshold set, thereby improving memory device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read-retry operations are performed to ensure reliability, then data accuracy is improved, but read latency increases significantly

Engineering Contradiction:
Improvedata accuracyVSAvoidread latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary tracking of read voltage thresholds using DNN during normal host reads, so that when read-retry operations are needed, the voltage thresholds are already updated and ready, eliminating the need for additional calibration reads and reducing latency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses the existing host reads to simultaneously serve dual purposes: data retrieval and voltage threshold tracking, eliminating the need for separate calibration operations and reducing overall read latency while maintaining reliability

Inventive Principle:
Principle #25Self-service

2Measurement precision

If additional reads are performed to track read voltage thresholds, then threshold accuracy is improved, but read latency increases

Engineering Contradiction:
Improvethreshold accuracyVSAvoidread latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The host reads are made multi-functional by using them for both data retrieval and voltage threshold tracking simultaneously, eliminating the need for additional dedicated calibration reads and thus reducing latency while maintaining threshold accuracy

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The existing host reads are leveraged to self-update the voltage thresholds through DNN processing, eliminating the need for separate calibration operations and reducing overall read latency while maintaining threshold accuracy

Inventive Principle:
Principle #25Self-service

3Measurement precision

If a large number of host reads are used to train DNN, then threshold prediction accuracy is improved, but data processing complexity increases

Engineering Contradiction:
Improvethreshold prediction accuracyVSAvoiddata processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system extracts only the necessary voltage threshold parameters from the large set of host reads, filtering out redundant information and focusing DNN training on the most relevant data points, thereby maintaining high prediction accuracy while reducing processing complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12455689B2Tracking read voltages in memory devices using deep neural networks
Publication Date: 2025.10.28 SK HYNIX INC
  • US12455689B2 patent drawing
  • US12455689B2 patent drawing
  • US12455689B2 patent drawing

AI summary

Devices, systems, and methods for improving performance of a memory device are described. An example method includes extracting parameters, which include a read threshold set, from each of a first set of host reads, replacing, based on the parameters, at least one host read from a second set of host reads by at least one host read from the first set of host reads, using a deep neural network (DNN) to generate an updated read threshold set, wherein an input to the DNN comprises the parameters from each of the second set of host reads subsequent to the replacing, and applying the updated read threshold set to the memory device to retrieve information from the memory device. In an example, the number of the first set of host reads is at least two orders of magnitude greater than the number of the second set of host reads.