Nonvolatile Memory Read Timing Control for Temperature Compensation
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Solution Overview
Problem
Nonvolatile semiconductor memory devices, particularly those with polycrystalline silicon channels, face challenges in maintaining data integrity due to variations in channel current with temperature changes, as threshold voltage distributions widen at lower temperatures, leading to read errors and data integrity issues when relying solely on adjusting read voltages.
Innovation Solution
The implementation of a nonvolatile memory device with control logic that adjusts the develop time of the bit line and sensing node based on current temperature, using a parameter selector and timing controller to select appropriate develop times corresponding to temperature ranges, thereby compensating for channel current variations and maintaining data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read voltage adjustment is used to compensate for temperature variations, then data integrity can be partially maintained, but threshold voltage distributions widen at lower temperatures causing read errors
Solution Approach 1:
The patent changes the timing parameter (develop time) in response to temperature variations. The control logic adjusts the develop time based on detected temperature, using longer develop times at lower temperatures to allow sufficient charge transfer despite reduced channel current, and shorter develop times at higher temperatures to prevent excessive charge transfer. This dynamic parameter adjustment compensates for temperature-induced threshold voltage distribution widening without requiring read voltage changes.
Solution Approach 2:
The patent implements a feedback mechanism where the temperature is detected by a temperature detector, and the detected temperature is fed back to the control logic which then adjusts the develop time accordingly. This closed-loop feedback system continuously monitors temperature and dynamically optimizes the read operation timing to maintain data integrity across varying temperature conditions.
2Reliability
If develop time is increased to compensate for lower channel current at low temperatures, then threshold voltage distribution consistency is improved, but read operation time increases
Solution Approach 1:
The patent employs dynamic adjustment of the develop time based on real-time temperature detection. Rather than using a fixed long develop time that would slow all operations, the system adapts the develop time to match current temperature conditions. At higher temperatures where channel current is stronger, shorter develop times are used, while at lower temperatures where channel current is weaker, longer develop times are applied. This dynamic approach maintains data integrity while minimizing unnecessary time delays.
3Device complexity
If fixed read parameters are used, then device complexity is reduced, but read errors occur due to temperature-induced channel current variations
Solution Approach 1:
The patent introduces dynamic parameter changes by adjusting the develop time based on temperature detection. The control logic receives temperature information from the temperature detector and modifies the develop time parameter accordingly, using longer times at lower temperatures and shorter times at higher temperatures. This parameter adaptation enables the system to maintain high read operation accuracy across varying temperature conditions without requiring complex voltage adjustment circuits.
Solution Approach 2:
The patent implements a feedback mechanism where temperature detection results are fed back to the control logic, which then adjusts the develop time parameter. This closed-loop control system continuously monitors temperature and dynamically optimizes read operation timing, enabling the device to adapt to temperature variations and maintain reliable read operations without using fixed parameters that would fail under varying conditions.
Data Source
AI summary
Disclosed is a nonvolatile memory device which includes a memory cell connected to a bit line and a word line; a page buffer electrically connected to the bit line and sensing data stored in the memory cell; and a control logic controlling the page buffer to vary a develop time of the bit line or a sensing node connected to the bit line according to a current temperature during a read operation.