Memory Read Trim Switching for Low-Latency Reliable Access
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Solution Overview
Problem
Conventional memory systems employ conservative trim settings to ensure reliability, leading to unnecessary latency in read operations, especially in non-volatile memory devices like NAND flash, due to manufacturing variances, wear, and temperature fluctuations, which compromise read performance.
Innovation Solution
Implementing an additional set of trim values tailored to specific conditions, determined by a reliability metric such as Bit Error Rate (BER), allowing for lower latency settings when the metric is satisfied, and reverting to conservative settings when it is not, thereby optimizing read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conservative trim settings are used to ensure reliability, then read reliability is improved, but read latency increases
Solution Approach 1:
The patent implements dynamic trim value selection that adapts to current memory device conditions. The system monitors reliability metrics (such as bit error rates) and automatically adjusts between conservative and aggressive trim settings based on real-time conditions, transforming the static trim configuration into a dynamic, condition-responsive parameter that optimizes both reliability and performance
Solution Approach 2:
The patent changes the trim parameter values based on monitored reliability metrics. When reliability metrics indicate good memory device condition, the system switches to aggressive trim values with lower latency; when metrics deteriorate, it reverts to conservative trim values, thereby dynamically adjusting parameters to resolve the contradiction between reliability and speed
2Speed
If aggressive trim settings are used to reduce latency, then read speed is improved, but read errors increase
Solution Approach 1:
The patent implements a feedback mechanism that continuously monitors reliability metrics (such as bit error rates) resulting from read operations. This feedback loop allows the system to detect when aggressive trim settings are causing excessive errors and automatically adjust back to conservative settings, thereby controlling the harmful side effect of increased read errors while maintaining improved speed when conditions permit
Solution Approach 2:
The system dynamically adjusts trim settings based on real-time feedback from reliability metrics, transitioning between aggressive and conservative configurations. This dynamic adaptation allows the system to exploit aggressive settings for speed when conditions are favorable while automatically retreating to conservative settings when errors increase, resolving the contradiction between speed and error rate
3Reliability
If conservative trim values are used universally, then reliability is maintained across all conditions, but read performance is compromised
Solution Approach 1:
The patent applies different trim value characteristics to different operational conditions rather than using a single universal setting. Based on locally assessed memory device conditions (through reliability metric monitoring), the system selects appropriate trim profiles - conservative when conditions are poor, aggressive when conditions are good - thereby optimizing performance for each specific operational context while maintaining reliability
Solution Approach 2:
The system transitions from static universal trim values to dynamic condition-specific trim selection. By continuously monitoring reliability metrics and adapting trim settings accordingly, the system achieves both reliability maintenance and performance optimization, eliminating the need to universally sacrifice performance for reliability
Data Source
AI summary
A system comprises a memory device and a processing device, which is coupled to the memory device. The processing device receives a read command to be performed on a set of memory cells of the memory device. The processing device determines whether a reliability metric satisfies a threshold criterion associated with the memory device. Responsive to determining that the reliability metric satisfies the threshold criterion associated with the memory device, the processing device selects a first set of trim values, wherein the first set of trim values corresponds to a latency value that is below a predefined threshold value. The processing device executes the read command with the selected set of trim values.