Memory Subsystem Preemptive Read Verification After Write Back
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Solution Overview
Problem
Current memory sub-systems lack a feedback mechanism to ensure that no errors are introduced during the write back operation and cannot determine if physical storage media degradation will cause errors in future data storage.
Innovation Solution
Implementing preemptive read verification after hardware write back, where the memory sub-system controller schedules a read verify operation if errors exceed a threshold, allowing verification of successful write back and media integrity, and remapping if necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware write back operation is performed to correct errors in read data, then data reliability is improved, but there is no verification mechanism to ensure write back success and media integrity
Solution Approach 1:
The patent implements a feedback mechanism by scheduling a read verify operation after the hardware write back operation. The controller receives notification of the write back operation, determines whether a read verify operation is already pending, and schedules a read verify operation if needed. This feedback loop allows the system to verify that the write back operation successfully corrected the errors and that the physical media location remains viable for future operations.
2Reliability
If read verify operation is scheduled after write back, then media degradation can be detected, but system complexity increases
Solution Approach 1:
The patent applies preliminary action by proactively scheduling a read verify operation after the write back operation is completed, before any potential data corruption or media failure occurs. The controller is configured to automatically determine whether a read verify operation is already pending and schedule one if needed, preventing future errors by verifying media integrity at the first opportunity after a write back operation.
Data Source
AI summary
A processing device in a memory sub-system receives an indication that a write back operation was performed for a management unit in a memory device. Responsive to receiving the indication that the write back operation was performed, the processing device initiates a read verify operation for the management unit and receives an indication of a number of write back errors associated with the management unit during the read verify operation. The processing device further determines whether the number of write back errors satisfies a read verify threshold criterion, and responsive to the number of write back errors satisfying the read verify threshold criterion, remaps the management unit to a different location on the memory device.