Memory System Read-Voltage Adaptation for Threshold Variations
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Solution Overview
Problem
There is a demand for memory systems to store data with high reliability, particularly in non-volatile memory systems, where existing technologies face challenges in accurately reading and correcting errors in data due to variations in threshold voltage distributions of memory cell transistors.
Innovation Solution
The memory system employs a memory controller that performs first and second-type shift amount estimations to adjust read voltages, using error correction codes to enhance data reading accuracy. This involves a memory controller with a CPU, ROM, RAM, host and non-volatile memory interfaces, and an error correction circuit to manage data storage and correction, along with digital-to-analog converters to adjust read voltages based on threshold voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a fixed read voltage is used for reading data from memory cells, then the reading operation is simple and fast, but the data reading accuracy deteriorates due to threshold voltage variations in memory cell transistors
Solution Approach 1:
The patent implements dynamic read voltage adjustment by estimating threshold voltage shifts and modifying read voltages accordingly. The memory controller dynamically calculates adjusted read voltages based on threshold voltage shift estimates derived from read disturb patterns, allowing the system to adapt to changing memory cell characteristics without manual intervention.
Solution Approach 2:
The system employs feedback mechanisms where read disturb information is collected and used to update threshold voltage shift estimates. These estimates then feed back into the read voltage adjustment process, creating a closed-loop system that continuously improves reading accuracy based on observed memory behavior patterns.
2Reliability
If error correction is performed on all read data to ensure high reliability, then data reliability improves, but the processing time and computational resources increase
Solution Approach 1:
The patent replaces intensive computational error correction with a lighter-weight threshold voltage estimation and adjustment mechanism. By substituting full error correction code processing with voltage shift estimation based on read disturb patterns, the system achieves improved reliability with significantly reduced processing overhead.
Solution Approach 2:
The system performs preliminary threshold voltage estimation and read voltage adjustment before actual data reading occurs. By proactively adjusting read voltages based on estimated threshold shifts, the system prevents errors rather than correcting them, eliminating the need for time-consuming post-read error correction processing.
3Measurement precision
If read voltages are adjusted frequently to account for threshold voltage shifts, then reading accuracy improves, but the system complexity and power consumption increase
Solution Approach 1:
The patent implements periodic threshold voltage estimation and read voltage adjustment based on read disturb patterns rather than continuous adjustment. The system estimates threshold voltage shifts at intervals determined by read operations, adjusting voltages only when necessary to maintain accuracy while minimizing unnecessary power consumption from frequent voltage changes.
Data Source
AI summary
In one embodiment, a memory system includes a non-volatile memory including a plurality of memory cells; and a memory controller. The memory controller is configured to store first data read from the plurality of memory cells using a first voltage in a storage circuit, store second data read from a bit group including respective bits of the plurality of memory cells using a first read voltage group in a storage circuit, perform an error correction of the second data, and determine, if third data is obtained as a result of successful error correction of the second data, a second read voltage group based on the first data stored in the storage circuit, the second data, and the third data.