Memory Cell Read Voltage Adjustment for Multi-Pass Programming

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Solution Overview

Problem

During multi-pass programming operations in semiconductor memory devices, read errors can occur due to neighboring word line interference and the back pattern effect, which are not effectively addressed by existing technologies.

Innovation Solution

A memory device controller adjusts read voltage levels and sensing timing based on the programming statuses of adjacent memory cells and the open block percentage of the memory block to correct these errors, employing offset voltages and sense time adjustments to minimize read errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-pass programming operations are used to program memory cells to multiple data states, then programming capacity and storage density are improved, but read errors occur due to neighboring word line interference and back pattern effects

Engineering Contradiction:
Improveprogramming capacityVSAvoidread reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the read voltage level based on the programming pass number and the state of neighboring word lines. During multi-pass programming, the read voltage is modified to compensate for the back pattern effect and neighboring word line interference, ensuring accurate sensing despite the changing electrical environment across multiple programming passes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback by using the determined programming statuses of neighboring memory cells to adjust the read voltage for sensing current memory cells. The controller continuously monitors the programming state of adjacent word lines and uses this information to dynamically modify the read voltage, creating a closed-loop system that corrects for interference effects in real-time during multi-pass programming operations.

Inventive Principle:
Principle #23Feedback

2Reliability

If read voltage is adjusted based on programming statuses of adjacent memory cells, then read reliability is improved, but device complexity increases due to additional sensing operations

Engineering Contradiction:
Improveread reliabilityVSAvoidsensing operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the sensing operation into distinct phases corresponding to different programming passes. The read voltage adjustment is segmented based on the specific pass number and the programming state of neighboring word lines, allowing the system to apply targeted corrections without requiring complete redesign of the entire sensing architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamics by making the read voltage adjustable and adaptive during the programming operation. Rather than using a fixed read voltage, the system dynamically modifies the read voltage level based on real-time feedback from neighboring cell states, enabling the sensing operation to adapt to changing conditions without requiring complex additional hardware.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20230377655A1Techniques for reading memory cells in a memory device during a multi-pass programming operation
Publication Date: 2023.11.23 SANDISK TECHNOLOGIES LLC
  • US20230377655A1 patent drawing
  • US20230377655A1 patent drawing
  • US20230377655A1 patent drawing

AI summary

The memory device that includes a memory block memory cells arranged in word lines. A controller is in electrical communication with the memory cells and is configured to program the memory cells to a first set of data states in a first programming pass and then to a greater second set of data states in a second programming pass. During programming of a first set of memory cells in at least one of the first and second programming passes, the controller is further configured to determine programming statuses of a second set of memory cells that is adjacent the first set of memory cells. The controller is further configured to read the first set of memory cells using a read voltage that is adjusted from a base read voltage based on the determined programming statuses of the second set of memory cells.