Memory Subsystem Read Voltage Selection via Write Transaction Catalog

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional memory sub-systems face inefficiencies in selecting read voltage levels due to time-varying bit error rates and noise mechanisms in non-volatile memory devices, leading to increased latency and potential read errors, as they rely on a single or sequential increase in read voltage levels without considering write-to-read delay.

Innovation Solution

The implementation of a write transaction catalog that stores physical addresses with associated write transaction data, allowing the memory sub-system to determine the write-to-read delay and select an optimal read voltage level based on this information, thereby reducing latency and improving system throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single or sequential read voltage level is used, then the device complexity is reduced, but the reliability deteriorates due to time-varying bit error rates and noise mechanisms

Engineering Contradiction:
Improveread voltage selection mechanismVSAvoidread operation reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent stores write transaction data (physical addresses and write timestamps) in advance in a catalog structure. When a read operation occurs, the system retrieves the stored write data and calculates the write-to-read delay, then selects the appropriate read voltage level based on this delay. This preliminary storage of write information enables proactive voltage selection without adding complex real-time analysis mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a write transaction catalog as an intermediary data structure that mediates between write operations and read operations. The catalog stores physical addresses and write timestamps, enabling the system to determine write-to-read delay and select appropriate read voltage levels. This intermediary structure resolves the contradiction by providing the necessary information for reliable read operations without requiring complex real-time voltage adjustment mechanisms.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple read voltage levels are implemented with dynamic selection, then the reliability is improved, but the device complexity increases

Engineering Contradiction:
Improveread operation reliabilityVSAvoidread voltage selection mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the read voltage selection process into discrete voltage levels (first read voltage level, second read voltage level, etc.) corresponding to different write-to-read delay ranges. Each voltage level is optimized for specific delay conditions, and the selection logic divides the decision space into manageable segments based on stored write transaction data. This segmentation enables reliable read operations across varying conditions without requiring a monolithic complex voltage control system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary storage of write transaction data in a catalog structure, recording physical addresses and write timestamps before read operations occur. This advance preparation enables the system to quickly determine write-to-read delay and select the appropriate voltage level without complex real-time calculations, reducing the complexity of the voltage selection mechanism while maintaining high reliability.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If write transaction data is stored in a catalog, then the productivity is improved through faster voltage selection, but the loss of time increases due to catalog search and data retrieval

Engineering Contradiction:
Improvesystem throughputVSAvoidcatalog search time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent stores write transaction data (physical addresses and write timestamps) in a catalog structure in advance, during write operations. This preliminary storage enables the system to quickly retrieve write data and calculate write-to-read delay during read operations without performing complex real-time analysis. The advance preparation of write information significantly reduces the time required for voltage selection, improving system throughput while minimizing the time penalty of catalog operations.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If read voltage is increased sequentially to handle errors, then the reliability is improved, but the loss of time increases due to retry operations

Engineering Contradiction:
Improveerror handling capabilityVSAvoidread retry latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary storage of write transaction data in a catalog, enabling the system to determine the appropriate read voltage level before attempting the read operation. By calculating the write-to-read delay from stored timestamps and selecting the optimal voltage level in advance, the system avoids the need for sequential voltage increases and retry operations. This proactive voltage selection eliminates read retry latency while maintaining high reliability through accurate voltage matching.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses stored write transaction data as feedback to determine the appropriate read voltage level. By retrieving write timestamps from the catalog and calculating the write-to-read delay, the system receives feedback about the data's age and selects the corresponding optimized voltage level. This feedback mechanism enables accurate voltage selection without trial-and-error retries, improving both reliability and reducing time loss.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11561734B2Selecting read voltage using write transaction data
Publication Date: 2023.01.24 MICRON TECHNOLOGY INC
  • US11561734B2 patent drawing
  • US11561734B2 patent drawing
  • US11561734B2 patent drawing

AI summary

A system includes a memory component; and a processing device, operatively coupled with the memory component. The processing device is to perform operations including receiving a read request with respect to data stored at a physical address of the memory component; determining whether an indicator of the physical address is stored in a write transaction catalog; in response to determining that the physical address is stored in the write transaction catalog, determining a time difference between when the read request was received and when the data was written; reading the data stored at the physical address using a first read voltage level in response to determining that the time difference is less than a threshold criterion; and reading the data stored at the physical address using a second read voltage level in response to determining that the time difference is equal to or greater than the threshold criterion.