Memory Cell Read-Voltage Classification for Bit Error Calibration

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Solution Overview

Problem

Conventional calibration methods for memory cells fail to accurately account for shifts in optimized threshold voltages due to factors like charge loss and temperature variations, leading to inefficiencies in data retrieval and increased error rates.

Innovation Solution

A data integrity classifier using a binary classification decision tree technique analyzes signal and noise characteristics to classify bit error rates, employing iterative and progressive techniques to compute compound features from multiple optimized read voltages, enabling precise calibration and error detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional calibration methods are used for memory cells, then the calibration process is simple, but the accuracy of threshold voltage measurement deteriorates due to shifts from charge loss and temperature variations

Engineering Contradiction:
Improvethreshold voltage measurement accuracyVSAvoidcalibration system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing iterative calibration steps before final data retrieval. The system pre-calibrates memory cells by measuring signal and noise characteristics at multiple read voltages, computing compound features, and predicting error rates before actual data operations. This preliminary calibration compensates for charge loss and temperature variations that would otherwise degrade measurement accuracy during normal operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through iterative calibration where the system measures signal and noise characteristics, computes compound features, predicts bit error rates, and uses these predictions to adjust subsequent calibration steps. The feedback loop continuously refines the calibration by comparing predicted error rates with actual performance, allowing the system to adapt to charge loss and temperature variations dynamically.

Inventive Principle:
Principle #23Feedback

2Reliability

If iterative calibration with multiple read voltages is performed, then data retrieval accuracy improves, but the time required for calibration increases

Engineering Contradiction:
Improvedata retrieval accuracyVSAvoidcalibration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by selectively calibrating memory cells based on predicted error rates. Instead of fully calibrating all memory cells uniformly, the system identifies cells with higher predicted error rates and focuses calibration efforts on those specific cells. This partial calibration approach maintains data retrieval accuracy for critical cells while reducing overall calibration time by skipping or simplifying calibration for cells with lower error predictions.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements parameter changes by dynamically adjusting calibration parameters such as read voltage levels and measurement sampling rates based on detected conditions. The system modifies calibration parameters adaptively - using fewer voltage levels when conditions are stable and more levels when charge loss or temperature variations are detected, thereby balancing accuracy requirements with time constraints.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If compound features are computed from multiple signal and noise characteristics, then error rate classification accuracy improves, but computational complexity increases

Engineering Contradiction:
Improveerror rate classification accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the computation of compound features into distinct modular steps. The system segments the feature computation process into: (1) measuring signal characteristics, (2) measuring noise characteristics, (3) computing intermediate features, and (4) combining into final compound features for error rate prediction. This segmentation allows each computational step to be optimized independently and enables parallel processing of different feature components, reducing overall computational complexity while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12512857B2Classification of error rate of data retrieved from memory cells
Publication Date: 2025.12.30 MICRON TECHNOLOGY INC
  • US12512857B2 patent drawing
  • US12512857B2 patent drawing
  • US12512857B2 patent drawing

AI summary

A memory sub-system configured to: measure a plurality of sets of signal and noise characteristics of a group of memory cells in a memory device; determine a plurality of optimized read voltages of the group of memory cells from the plurality of sets of signal and noise characteristics respectively; generate features from the plurality of sets of signal and noise characteristics, including at least one compound feature generated from the plurality of sets of signal and noise characteristics; generate, using the features, a classification of a bit error rate of data retrievable from the group of memory cells; and control an operation to read the group of memory cells based on the classification.