Memory Read Voltage Control for Charge Loss Compensation
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Solution Overview
Problem
The IVS effect in charge trap type memory cells leads to high read errors due to fast charge loss, causing the threshold voltage to shift after programming, which affects the accuracy of read operations.
Innovation Solution
The memory controller determines the time period between writing and reading data and adjusts the read voltage based on the voltage shift to compensate for the IVS effect, ensuring a higher probability of successful read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If charge trap type memory cells are used for storage, then storage density and programming speed are improved, but read errors increase due to fast charge loss and threshold voltage shift
Solution Approach 1:
The system performs preliminary actions by determining the time period between programming and read operations, and proactively selects an appropriate read voltage level based on this time period before the actual read operation occurs. This preliminary voltage selection compensates for the anticipated charge loss, ensuring accurate reading despite the IVS effect in charge trap type memory cells.
Solution Approach 2:
The invention changes the read voltage parameter dynamically based on the time period since programming. The memory controller selects from multiple read voltage levels (e.g., first read voltage level for shorter time periods, second read voltage level for longer time periods) to compensate for the time-dependent threshold voltage shift caused by charge loss, thereby maintaining read accuracy across different time conditions.
2Measurement precision
If read voltage is adjusted to compensate for threshold voltage shift, then read accuracy is improved, but system complexity increases due to time period determination and voltage selection mechanisms
Solution Approach 1:
The system establishes a preliminary mapping between time periods and read voltage levels before actual operation. The memory controller determines the time period between programming and read operations, then selects the appropriate read voltage level based on this determined time period, enabling accurate reading without requiring complex real-time calculations during the read operation itself.
Solution Approach 2:
The system incorporates feedback by monitoring the time period between programming and read operations, and using this information to dynamically select the appropriate read voltage level. This feedback mechanism ensures that the read voltage is continuously adapted to the actual charge loss conditions, maintaining high read accuracy while using a manageable control complexity.
Data Source
AI summary
Examples of the present application disclose memory systems, methods of operating the same, and readable storage mediums. An example memory system includes a memory device and a memory controller coupled to the memory device. The memory controller is configured to: in response to a read command, determine a time period to which a time difference between writing and reading of data to be read corresponding to the read command belongs; determine an amount of the voltage shift according to the time period to which the time difference between the writing and reading of the data to be read belongs; and determine a read voltage for reading the data to be read based on the amount of the voltage shift and the default read voltage.