Memory Cell Read Voltage Control for Verify Threshold Order
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor memory devices face issues with erroneous reading of memory cells, which can lead to data integrity problems.
Innovation Solution
The semiconductor memory device employs a design with bit lines and word lines arranged in specific directions, incorporating a driver to supply voltages and a logic control circuit for precise write and read operations, including multiple loops with distinct sense operations for verify and read thresholds to ensure accurate threshold voltage determination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional read operations are performed without considering verify operation threshold orders, then reading speed is maintained, but erroneous reading occurs and data reliability deteriorates
Solution Approach 1:
The patent applies preliminary action by pre-determining the threshold voltage order relationship between verify operations during the write phase. The control circuit stores this order information and uses it during subsequent read operations to apply appropriate read voltages, preventing erroneous reading before it can occur. This advance preparation eliminates the need for complex real-time adjustments during reading.
Solution Approach 2:
The patent changes the voltage parameter dynamically based on the determined threshold order. Different read voltages are applied to different word lines depending on their verify operation threshold relationships. This parameter adaptation allows accurate reading while maintaining simple control logic, as the voltage selection follows predetermined rules rather than requiring complex real-time analysis.
2Measurement precision
If multiple read voltages are applied based on verify threshold orders, then measurement precision of threshold voltage is improved, but device complexity increases
Solution Approach 1:
The control circuit pre-determines and stores the threshold voltage order relationships during write operations. This preliminary establishment of voltage hierarchies allows the system to apply appropriate read voltages during subsequent operations without requiring complex real-time calculations, thereby improving measurement precision while keeping the control circuit relatively simple.
Solution Approach 2:
The patent implements parameter changes by selecting different read voltages based on the predetermined threshold order. Each word line receives a specific voltage level determined by its verify operation characteristics, enabling accurate threshold voltage measurement while following systematic voltage selection rules that prevent control circuit complexity from becoming unmanageable.
3Measurement precision
If verify operations are performed with different threshold orders, then data accuracy is improved, but operation time increases
Solution Approach 1:
The patent performs preliminary determination of threshold voltage orders during the write operation phase. By establishing the voltage hierarchy in advance, the system avoids time-consuming real-time analysis during read operations. The control circuit simply retrieves and applies the pre-determined voltage orders, achieving accurate data reading without significant time penalty.
Solution Approach 2:
The patent applies partial action by performing verify operations only on the necessary word lines with appropriate voltage levels based on the determined threshold order. Rather than uniformly applying complex verification procedures to all memory cells, the system selectively applies verification only where needed according to the threshold hierarchy, reducing overall operation time while maintaining data accuracy.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A semiconductor memory device according to an embodiment includes i first word lines connected to the i first memory cells, i second word lines connected to the i second memory cells, a driver capable of supplying voltage to each of the i first word lines and each of the i second word lines, and a logic control circuit controlling both a write operation including a verify operation and a read operation including a verify operation. In the semiconductor memory device, when an order of performing a sense operation for determining whether or not a threshold voltage of the k-th first memory cell has reached a j-th threshold voltage in the verify operation is different from that of in the read operation, a voltage applied to the k-th first word line in the verify operation is different from a voltage applied to the k-th first word line in the read operation.