Memory System Read Voltage Adaptation for Data Integrity
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Solution Overview
Problem
Conventional semiconductor memory systems face data integrity issues due to variations in charge held by memory cells over time, leading to errors in data retrieval, as the threshold voltage distributions change, affecting the accuracy of read operations.
Innovation Solution
A memory system with a processor that manages read voltages by shifting them based on error correction outcomes, using a shift index table to select appropriate read voltages for retry reads and patrol reads, ensuring data integrity by adapting to changes in threshold voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If read voltage is shifted according to charge variation, then data accuracy is improved, but device complexity increases due to multiple voltage management mechanisms
Solution Approach 1:
The system performs patrol reads proactively before actual data read operations to detect charge variations and determine appropriate read voltages in advance. The read voltage determination unit stores determined voltages in a storage unit, so when data is actually read, the pre-determined voltage can be applied directly, improving data accuracy while avoiding complex real-time voltage adjustment mechanisms.
Solution Approach 2:
The memory device performs self-diagnosis through patrol reads, automatically detecting its own charge variations and determining appropriate read voltages without external intervention. This self-service mechanism allows the system to adapt to its own degradation, maintaining data accuracy while keeping the control logic relatively simple.
2Reliability
If retry reads are performed with shifted voltages, then data retrieval reliability is improved, but operation time increases due to multiple read attempts
Solution Approach 1:
The system performs patrol reads in advance to determine the optimal read voltage before actual data read operations. By pre-determining the correct voltage through patrol reads, the system reduces the likelihood of needing multiple retry reads, thereby improving data retrieval reliability while minimizing the time penalty associated with repeated read attempts.
Solution Approach 2:
The system uses results from patrol reads as feedback to determine appropriate read voltages for subsequent operations. This feedback mechanism allows the system to learn from previous read attempts and adjust voltages accordingly, improving reliability while reducing the need for time-consuming retry operations.
3Measurement precision
If patrol reads are executed frequently, then charge variation detection accuracy is improved, but productivity decreases due to increased read operations
Solution Approach 1:
The system performs patrol reads on a selective and moderate basis rather than continuously or excessively. By performing patrol reads only when necessary to detect significant charge variations, the system achieves sufficient detection accuracy while minimizing the impact on productivity. The read voltage determination unit applies determined voltages to multiple blocks efficiently, further reducing the productivity penalty.
Solution Approach 2:
The patrol read mechanism serves multiple functions: it detects charge variations, determines optimal read voltages, and validates data integrity. This multi-functionality allows the system to achieve accurate charge variation detection without requiring separate verification operations, thereby maintaining productivity while improving measurement precision.
Data Source
AI summary
According to one embodiment, a memory system includes a memory, and a processor. The memory converts an amount of charge held by a memory cell into a value. The processor executes a first process of reading first data from the memory. The processor executes a second process of reading the first data by making the memory use a first determination potential different in a case where error correction of the first data read through the first process is failed. The processor executes a third process of reading second data from the memory by making the memory use a third determination potential in a case where error correction of the first data read through the second process is succeeded. The third determination potential is the first determination potential used by the memory in a case where error correction of the first data read through the second process is succeeded.