Semiconductor Memory Read Control for Skipping Word Line Discharge
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in improving read operation speed, particularly when repeated read operations are performed on the same word line, due to RC delays and the need for word line discharge operations.
Innovation Solution
Implementing a controller that transmits different types of read commands to the semiconductor memory device, including a first type that performs a word line discharge operation and a second type that skips this step, allowing for optimized read operations based on the success of error correction, thereby reducing overall read time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a word line discharge operation is performed during every read operation, then the memory device maintains proper voltage levels and avoids data corruption, but the read operation speed decreases due to the additional time required for discharge
Solution Approach 1:
The patent implements dynamic adjustment of the read operation protocol based on operational context. The controller determines whether to include word line discharge based on whether this is a repeated read operation on the same word line, transitioning between two operational modes: full read with discharge for reliability and optimized read without discharge for speed.
Solution Approach 2:
The patent changes the operational parameters of the read command by introducing two distinct command types: a first type that includes word line discharge operation and a second type that excludes it. The controller selectively transmits different command types based on the read operation history, thereby changing the system's operational state to optimize performance.
2Reliability
If the controller always transmits the first type of read command that includes word line discharge, then data accuracy is maintained, but the overall read time increases due to unnecessary discharge operations during repeated reads
Solution Approach 1:
The controller implements a feedback mechanism by tracking the history of read operations on each word line. When the controller detects that a read operation targets the same word line as a previous read, it uses this feedback information to determine that the word line voltage is already at the appropriate level, thereby eliminating the need for redundant discharge operations.
Solution Approach 2:
The controller performs preliminary assessment of the read command type needed before executing the read operation. By checking whether a previous read operation was performed on the same word line, the controller pre-determines whether word line discharge is necessary, thereby avoiding unnecessary operations and reducing read time.
3Speed
If the controller transmits the second type of read command that skips word line discharge during repeated reads, then read speed is improved, but there is a risk of voltage level instability affecting data integrity
Solution Approach 1:
The system uses the residual voltage state from the previous read operation to serve the current read operation. The word line maintains its voltage level from the prior read, and this self-sustaining voltage state enables subsequent reads to proceed without discharge, thereby improving speed while maintaining reliability through controlled conditions.
Data Source
AI summary
A semiconductor memory device includes a memory cell array, a peripheral circuit, and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a read operation on selected memory cells, among the plurality of memory cells. The control logic controls the read operation of the peripheral circuit in response to a read command that is received from an external device and determines whether to perform a discharge operation of word lines that are connected to the plurality of memory cells based on a type of the read command.